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1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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524 (void)Inst; | 524 (void)Inst; |
525 UnimplementedError(Func->getContext()->getFlags()); | 525 UnimplementedError(Func->getContext()->getFlags()); |
526 } | 526 } |
527 | 527 |
528 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) { | 528 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) { |
529 Variable *Dest = Inst->getDest(); | 529 Variable *Dest = Inst->getDest(); |
530 Operand *Src0 = legalizeUndef(Inst->getSrc(0)); | 530 Operand *Src0 = legalizeUndef(Inst->getSrc(0)); |
531 Operand *Src1 = legalizeUndef(Inst->getSrc(1)); | 531 Operand *Src1 = legalizeUndef(Inst->getSrc(1)); |
532 if (Dest->getType() == IceType_i64) { | 532 if (Dest->getType() == IceType_i64) { |
533 // TODO(reed kotler): fakedef needed for now until all cases are implemented | 533 // TODO(reed kotler): fakedef needed for now until all cases are implemented |
534 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); | 534 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); |
535 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); | 535 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
536 Context.insert(InstFakeDef::create(Func, DestLo)); | 536 Context.insert(InstFakeDef::create(Func, DestLo)); |
537 Context.insert(InstFakeDef::create(Func, DestHi)); | 537 Context.insert(InstFakeDef::create(Func, DestHi)); |
538 UnimplementedError(Func->getContext()->getFlags()); | 538 UnimplementedError(Func->getContext()->getFlags()); |
539 return; | 539 return; |
540 } | 540 } |
541 if (isVectorType(Dest->getType())) { | 541 if (isVectorType(Dest->getType())) { |
542 Context.insert(InstFakeDef::create(Func, Dest)); | 542 Context.insert(InstFakeDef::create(Func, Dest)); |
543 UnimplementedError(Func->getContext()->getFlags()); | 543 UnimplementedError(Func->getContext()->getFlags()); |
544 return; | 544 return; |
545 } | 545 } |
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609 } | 609 } |
610 | 610 |
611 void TargetMIPS32::lowerAssign(const InstAssign *Inst) { | 611 void TargetMIPS32::lowerAssign(const InstAssign *Inst) { |
612 Variable *Dest = Inst->getDest(); | 612 Variable *Dest = Inst->getDest(); |
613 Operand *Src0 = Inst->getSrc(0); | 613 Operand *Src0 = Inst->getSrc(0); |
614 assert(Dest->getType() == Src0->getType()); | 614 assert(Dest->getType() == Src0->getType()); |
615 if (Dest->getType() == IceType_i64) { | 615 if (Dest->getType() == IceType_i64) { |
616 Src0 = legalizeUndef(Src0); | 616 Src0 = legalizeUndef(Src0); |
617 Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg); | 617 Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg); |
618 Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg); | 618 Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg); |
619 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); | 619 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); |
620 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); | 620 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
621 // Variable *T_Lo = nullptr, *T_Hi = nullptr; | 621 // Variable *T_Lo = nullptr, *T_Hi = nullptr; |
622 Variable *T_Lo = makeReg(IceType_i32); | 622 Variable *T_Lo = makeReg(IceType_i32); |
623 Variable *T_Hi = makeReg(IceType_i32); | 623 Variable *T_Hi = makeReg(IceType_i32); |
624 _mov(T_Lo, Src0Lo); | 624 _mov(T_Lo, Src0Lo); |
625 _mov(DestLo, T_Lo); | 625 _mov(DestLo, T_Lo); |
626 _mov(T_Hi, Src0Hi); | 626 _mov(T_Hi, Src0Hi); |
627 _mov(DestHi, T_Hi); | 627 _mov(DestHi, T_Hi); |
628 } else { | 628 } else { |
629 Operand *SrcR; | 629 Operand *SrcR; |
630 if (Dest->hasReg()) { | 630 if (Dest->hasReg()) { |
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1074 Ostream &Str = Ctx->getStrEmit(); | 1074 Ostream &Str = Ctx->getStrEmit(); |
1075 Str << "\t.set\tnomicromips\n"; | 1075 Str << "\t.set\tnomicromips\n"; |
1076 Str << "\t.set\tnomips16\n"; | 1076 Str << "\t.set\tnomips16\n"; |
1077 } | 1077 } |
1078 | 1078 |
1079 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; | 1079 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM]; |
1080 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 1080 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
1081 llvm::SmallBitVector TargetMIPS32::ScratchRegs; | 1081 llvm::SmallBitVector TargetMIPS32::ScratchRegs; |
1082 | 1082 |
1083 } // end of namespace Ice | 1083 } // end of namespace Ice |
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