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| 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===// | 1 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 /// \file | 10 /// \file |
| (...skipping 116 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 127 Str << ", "; | 127 Str << ", "; |
| 128 Inst->getSrc(0)->emit(Func); | 128 Inst->getSrc(0)->emit(Func); |
| 129 Str << ", "; | 129 Str << ", "; |
| 130 Inst->getSrc(1)->emit(Func); | 130 Inst->getSrc(1)->emit(Func); |
| 131 } | 131 } |
| 132 | 132 |
| 133 void InstMIPS32Ret::emit(const Cfg *Func) const { | 133 void InstMIPS32Ret::emit(const Cfg *Func) const { |
| 134 if (!BuildDefs::dump()) | 134 if (!BuildDefs::dump()) |
| 135 return; | 135 return; |
| 136 assert(getSrcSize() > 0); | 136 assert(getSrcSize() > 0); |
| 137 Variable *RA = llvm::cast<Variable>(getSrc(0)); | 137 auto *RA = llvm::cast<Variable>(getSrc(0)); |
| 138 assert(RA->hasReg()); | 138 assert(RA->hasReg()); |
| 139 assert(RA->getRegNum() == RegMIPS32::Reg_RA); | 139 assert(RA->getRegNum() == RegMIPS32::Reg_RA); |
| 140 Ostream &Str = Func->getContext()->getStrEmit(); | 140 Ostream &Str = Func->getContext()->getStrEmit(); |
| 141 Str << "\t" | 141 Str << "\t" |
| 142 << "jr" | 142 << "jr" |
| 143 << "\t"; | 143 << "\t"; |
| 144 RA->emit(Func); | 144 RA->emit(Func); |
| 145 } | 145 } |
| 146 | 146 |
| 147 void InstMIPS32Ret::emitIAS(const Cfg *Func) const { | 147 void InstMIPS32Ret::emitIAS(const Cfg *Func) const { |
| (...skipping 71 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 219 DestHi->emit(Func); | 219 DestHi->emit(Func); |
| 220 Str << ", "; | 220 Str << ", "; |
| 221 Src->emit(Func); | 221 Src->emit(Func); |
| 222 } | 222 } |
| 223 | 223 |
| 224 void InstMIPS32Mov::emitSingleDestMultiSource(const Cfg *Func) const { | 224 void InstMIPS32Mov::emitSingleDestMultiSource(const Cfg *Func) const { |
| 225 if (!BuildDefs::dump()) | 225 if (!BuildDefs::dump()) |
| 226 return; | 226 return; |
| 227 Ostream &Str = Func->getContext()->getStrEmit(); | 227 Ostream &Str = Func->getContext()->getStrEmit(); |
| 228 Variable *Dest = getDest(); | 228 Variable *Dest = getDest(); |
| 229 Variable *SrcLo = llvm::cast<Variable>(getSrc(0)); | 229 auto *SrcLo = llvm::cast<Variable>(getSrc(0)); |
| 230 Variable *SrcHi = llvm::cast<Variable>(getSrc(1)); | 230 auto *SrcHi = llvm::cast<Variable>(getSrc(1)); |
| 231 | 231 |
| 232 assert(SrcHi->hasReg()); | 232 assert(SrcHi->hasReg()); |
| 233 assert(SrcLo->hasReg()); | 233 assert(SrcLo->hasReg()); |
| 234 assert(Dest->hasReg()); | 234 assert(Dest->hasReg()); |
| 235 assert(getSrcSize() == 2); | 235 assert(getSrcSize() == 2); |
| 236 | 236 |
| 237 // Str << "\t" | 237 // Str << "\t" |
| 238 // << "vmov" << getPredicate() << "\t"; | 238 // << "vmov" << getPredicate() << "\t"; |
| 239 Dest->emit(Func); | 239 Dest->emit(Func); |
| 240 Str << ", "; | 240 Str << ", "; |
| (...skipping 27 matching lines...) Expand all Loading... |
| 268 Str << "move"; | 268 Str << "move"; |
| 269 } | 269 } |
| 270 | 270 |
| 271 Str << "\t"; | 271 Str << "\t"; |
| 272 getDest()->emit(Func); | 272 getDest()->emit(Func); |
| 273 Str << ", "; | 273 Str << ", "; |
| 274 getSrc(0)->emit(Func); | 274 getSrc(0)->emit(Func); |
| 275 } | 275 } |
| 276 | 276 |
| 277 } // end of namespace Ice | 277 } // end of namespace Ice |
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