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1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// | 1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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34 IceString CfgNode::getName() const { | 34 IceString CfgNode::getName() const { |
35 if (NameIndex >= 0) | 35 if (NameIndex >= 0) |
36 return Func->getIdentifierName(NameIndex); | 36 return Func->getIdentifierName(NameIndex); |
37 return "__" + std::to_string(LabelNumber); | 37 return "__" + std::to_string(LabelNumber); |
38 } | 38 } |
39 | 39 |
40 // Adds an instruction to either the Phi list or the regular instruction list. | 40 // Adds an instruction to either the Phi list or the regular instruction list. |
41 // Validates that all Phis are added before all regular instructions. | 41 // Validates that all Phis are added before all regular instructions. |
42 void CfgNode::appendInst(Inst *Inst) { | 42 void CfgNode::appendInst(Inst *Inst) { |
43 ++InstCountEstimate; | 43 ++InstCountEstimate; |
44 if (InstPhi *Phi = llvm::dyn_cast<InstPhi>(Inst)) { | 44 if (auto *Phi = llvm::dyn_cast<InstPhi>(Inst)) { |
45 if (!Insts.empty()) { | 45 if (!Insts.empty()) { |
46 Func->setError("Phi instruction added to the middle of a block"); | 46 Func->setError("Phi instruction added to the middle of a block"); |
47 return; | 47 return; |
48 } | 48 } |
49 Phis.push_back(Phi); | 49 Phis.push_back(Phi); |
50 } else { | 50 } else { |
51 Insts.push_back(Inst); | 51 Insts.push_back(Inst); |
52 } | 52 } |
53 } | 53 } |
54 | 54 |
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197 // could also do it here. | 197 // could also do it here. |
198 InstList::iterator SafeInsertionPoint = InsertionPoint; | 198 InstList::iterator SafeInsertionPoint = InsertionPoint; |
199 // Keep track of the dest variable of a compare instruction, so that we | 199 // Keep track of the dest variable of a compare instruction, so that we |
200 // insert the new instruction at the SafeInsertionPoint if the compare's dest | 200 // insert the new instruction at the SafeInsertionPoint if the compare's dest |
201 // matches the Phi-lowered assignment's source. | 201 // matches the Phi-lowered assignment's source. |
202 Variable *CmpInstDest = nullptr; | 202 Variable *CmpInstDest = nullptr; |
203 // If the current insertion point is at a conditional branch instruction, and | 203 // If the current insertion point is at a conditional branch instruction, and |
204 // the previous instruction is a compare instruction, then we move the | 204 // the previous instruction is a compare instruction, then we move the |
205 // insertion point before the compare instruction so as not to interfere with | 205 // insertion point before the compare instruction so as not to interfere with |
206 // compare/branch fusing. | 206 // compare/branch fusing. |
207 if (InstBr *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) { | 207 if (auto *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) { |
208 if (!Branch->isUnconditional()) { | 208 if (!Branch->isUnconditional()) { |
209 if (InsertionPoint != Insts.begin()) { | 209 if (InsertionPoint != Insts.begin()) { |
210 --InsertionPoint; | 210 --InsertionPoint; |
211 if (llvm::isa<InstIcmp>(InsertionPoint) || | 211 if (llvm::isa<InstIcmp>(InsertionPoint) || |
212 llvm::isa<InstFcmp>(InsertionPoint)) { | 212 llvm::isa<InstFcmp>(InsertionPoint)) { |
213 CmpInstDest = InsertionPoint->getDest(); | 213 CmpInstDest = InsertionPoint->getDest(); |
214 } else { | 214 } else { |
215 ++InsertionPoint; | 215 ++InsertionPoint; |
216 } | 216 } |
217 } | 217 } |
218 } | 218 } |
219 } | 219 } |
220 | 220 |
221 // Consider every out-edge. | 221 // Consider every out-edge. |
222 for (CfgNode *Succ : OutEdges) { | 222 for (CfgNode *Succ : OutEdges) { |
223 // Consider every Phi instruction at the out-edge. | 223 // Consider every Phi instruction at the out-edge. |
224 for (Inst &I : Succ->Phis) { | 224 for (Inst &I : Succ->Phis) { |
225 auto *Phi = llvm::dyn_cast<InstPhi>(&I); | 225 auto *Phi = llvm::dyn_cast<InstPhi>(&I); |
226 Operand *Operand = Phi->getOperandForTarget(this); | 226 Operand *Operand = Phi->getOperandForTarget(this); |
227 assert(Operand); | 227 assert(Operand); |
228 Variable *Dest = I.getDest(); | 228 Variable *Dest = I.getDest(); |
229 assert(Dest); | 229 assert(Dest); |
230 InstAssign *NewInst = InstAssign::create(Func, Dest, Operand); | 230 auto *NewInst = InstAssign::create(Func, Dest, Operand); |
231 if (CmpInstDest == Operand) | 231 if (CmpInstDest == Operand) |
232 Insts.insert(SafeInsertionPoint, NewInst); | 232 Insts.insert(SafeInsertionPoint, NewInst); |
233 else | 233 else |
234 Insts.insert(InsertionPoint, NewInst); | 234 Insts.insert(InsertionPoint, NewInst); |
235 } | 235 } |
236 } | 236 } |
237 } | 237 } |
238 | 238 |
239 // Deletes the phi instructions after the loads and stores are placed. | 239 // Deletes the phi instructions after the loads and stores are placed. |
240 void CfgNode::deletePhis() { | 240 void CfgNode::deletePhis() { |
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994 return; | 994 return; |
995 // Update emitted instruction count, plus fill/spill count for Variable | 995 // Update emitted instruction count, plus fill/spill count for Variable |
996 // operands without a physical register. | 996 // operands without a physical register. |
997 if (uint32_t Count = I->getEmitInstCount()) { | 997 if (uint32_t Count = I->getEmitInstCount()) { |
998 Func->getContext()->statsUpdateEmitted(Count); | 998 Func->getContext()->statsUpdateEmitted(Count); |
999 if (Variable *Dest = I->getDest()) { | 999 if (Variable *Dest = I->getDest()) { |
1000 if (!Dest->hasReg()) | 1000 if (!Dest->hasReg()) |
1001 Func->getContext()->statsUpdateFills(); | 1001 Func->getContext()->statsUpdateFills(); |
1002 } | 1002 } |
1003 for (SizeT S = 0; S < I->getSrcSize(); ++S) { | 1003 for (SizeT S = 0; S < I->getSrcSize(); ++S) { |
1004 if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) { | 1004 if (auto *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) { |
1005 if (!Src->hasReg()) | 1005 if (!Src->hasReg()) |
1006 Func->getContext()->statsUpdateSpills(); | 1006 Func->getContext()->statsUpdateSpills(); |
1007 } | 1007 } |
1008 } | 1008 } |
1009 } | 1009 } |
1010 } | 1010 } |
1011 | 1011 |
1012 } // end of anonymous namespace | 1012 } // end of anonymous namespace |
1013 | 1013 |
1014 void CfgNode::emit(Cfg *Func) const { | 1014 void CfgNode::emit(Cfg *Func) const { |
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1397 Operand *RMWI64Name = Context->getConstantExternSym(RMW_I64); | 1397 Operand *RMWI64Name = Context->getConstantExternSym(RMW_I64); |
1398 constexpr RelocOffsetT Offset = 0; | 1398 constexpr RelocOffsetT Offset = 0; |
1399 constexpr bool SuppressMangling = true; | 1399 constexpr bool SuppressMangling = true; |
1400 Constant *Counter = | 1400 Constant *Counter = |
1401 Context->getConstantSym(Offset, Var->getName(), SuppressMangling); | 1401 Context->getConstantSym(Offset, Var->getName(), SuppressMangling); |
1402 Constant *AtomicRMWOp = Context->getConstantInt32(Intrinsics::AtomicAdd); | 1402 Constant *AtomicRMWOp = Context->getConstantInt32(Intrinsics::AtomicAdd); |
1403 Constant *One = Context->getConstantInt64(1); | 1403 Constant *One = Context->getConstantInt64(1); |
1404 Constant *OrderAcquireRelease = | 1404 Constant *OrderAcquireRelease = |
1405 Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease); | 1405 Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease); |
1406 | 1406 |
1407 InstIntrinsicCall *Inst = InstIntrinsicCall::create( | 1407 auto *Inst = InstIntrinsicCall::create( |
1408 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); | 1408 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); |
1409 Inst->addArg(AtomicRMWOp); | 1409 Inst->addArg(AtomicRMWOp); |
1410 Inst->addArg(Counter); | 1410 Inst->addArg(Counter); |
1411 Inst->addArg(One); | 1411 Inst->addArg(One); |
1412 Inst->addArg(OrderAcquireRelease); | 1412 Inst->addArg(OrderAcquireRelease); |
1413 Insts.push_front(Inst); | 1413 Insts.push_front(Inst); |
1414 } | 1414 } |
1415 | 1415 |
1416 } // end of namespace Ice | 1416 } // end of namespace Ice |
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