Subzero: Use "auto" per (unwritten) auto coding style.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 23 matching lines @@
 IceString CfgNode::getName() const {
   if (NameIndex >= 0)
     return Func->getIdentifierName(NameIndex);
   return "__" + std::to_string(LabelNumber);
 }
 
 // Adds an instruction to either the Phi list or the regular instruction list.
 // Validates that all Phis are added before all regular instructions.
 void CfgNode::appendInst(Inst *Inst) {
   ++InstCountEstimate;
-  if (InstPhi *Phi = llvm::dyn_cast<InstPhi>(Inst)) {
+  if (auto *Phi = llvm::dyn_cast<InstPhi>(Inst)) {
     if (!Insts.empty()) {
       Func->setError("Phi instruction added to the middle of a block");
       return;
     }
     Phis.push_back(Phi);
   } else {
     Insts.push_back(Inst);
   }
 }
 
@@ skipping 142 matching lines @@
   // could also do it here.
   InstList::iterator SafeInsertionPoint = InsertionPoint;
   // Keep track of the dest variable of a compare instruction, so that we
   // insert the new instruction at the SafeInsertionPoint if the compare's dest
   // matches the Phi-lowered assignment's source.
   Variable *CmpInstDest = nullptr;
   // If the current insertion point is at a conditional branch instruction, and
   // the previous instruction is a compare instruction, then we move the
   // insertion point before the compare instruction so as not to interfere with
   // compare/branch fusing.
-  if (InstBr *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) {
+  if (auto *Branch = llvm::dyn_cast<InstBr>(InsertionPoint)) {
     if (!Branch->isUnconditional()) {
       if (InsertionPoint != Insts.begin()) {
         --InsertionPoint;
         if (llvm::isa<InstIcmp>(InsertionPoint) ||
             llvm::isa<InstFcmp>(InsertionPoint)) {
           CmpInstDest = InsertionPoint->getDest();
         } else {
           ++InsertionPoint;
         }
       }
     }
   }
 
   // Consider every out-edge.
   for (CfgNode *Succ : OutEdges) {
     // Consider every Phi instruction at the out-edge.
     for (Inst &I : Succ->Phis) {
       auto *Phi = llvm::dyn_cast<InstPhi>(&I);
       Operand *Operand = Phi->getOperandForTarget(this);
       assert(Operand);
       Variable *Dest = I.getDest();
       assert(Dest);
-      InstAssign *NewInst = InstAssign::create(Func, Dest, Operand);
+      auto *NewInst = InstAssign::create(Func, Dest, Operand);
       if (CmpInstDest == Operand)
         Insts.insert(SafeInsertionPoint, NewInst);
       else
         Insts.insert(InsertionPoint, NewInst);
     }
   }
 }
 
 // Deletes the phi instructions after the loads and stores are placed.
 void CfgNode::deletePhis() {
@@ skipping 753 matching lines @@
     return;
   // Update emitted instruction count, plus fill/spill count for Variable
   // operands without a physical register.
   if (uint32_t Count = I->getEmitInstCount()) {
     Func->getContext()->statsUpdateEmitted(Count);
     if (Variable *Dest = I->getDest()) {
       if (!Dest->hasReg())
         Func->getContext()->statsUpdateFills();
     }
     for (SizeT S = 0; S < I->getSrcSize(); ++S) {
-      if (Variable *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
+      if (auto *Src = llvm::dyn_cast<Variable>(I->getSrc(S))) {
         if (!Src->hasReg())
           Func->getContext()->statsUpdateSpills();
       }
     }
   }
 }
 
 } // end of anonymous namespace
 
 void CfgNode::emit(Cfg *Func) const {
@@ skipping 382 matching lines @@
   Operand *RMWI64Name = Context->getConstantExternSym(RMW_I64);
   constexpr RelocOffsetT Offset = 0;
   constexpr bool SuppressMangling = true;
   Constant *Counter =
       Context->getConstantSym(Offset, Var->getName(), SuppressMangling);
   Constant *AtomicRMWOp = Context->getConstantInt32(Intrinsics::AtomicAdd);
   Constant *One = Context->getConstantInt64(1);
   Constant *OrderAcquireRelease =
       Context->getConstantInt32(Intrinsics::MemoryOrderAcquireRelease);
 
-  InstIntrinsicCall *Inst = InstIntrinsicCall::create(
+  auto *Inst = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Inst->addArg(AtomicRMWOp);
   Inst->addArg(Counter);
   Inst->addArg(One);
   Inst->addArg(OrderAcquireRelease);
   Insts.push_front(Inst);
 }
 
 } // end of namespace Ice