Add the RSC instruction to the ARM integrated assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 525 matching lines @@
     emitUsingTextFixup(Func);
 }
 
 template <> void InstARM32Rsb::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->rsb(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
+template <> void InstARM32Rsc::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  Asm->rsc(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 template <> void InstARM32Sbc::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   Asm->sbc(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());
   if (Asm->needsTextFixup())
     emitUsingTextFixup(Func);
 }
 
 template <> void InstARM32Sdiv::emitIAS(const Cfg *Func) const {
   assert(!SetFlags);
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
@@ skipping 1464 matching lines @@
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice