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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // | 4 // |
| 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe | 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe |
| 6 // Please update the (git) revision if we merge changes from Dart. | 6 // Please update the (git) revision if we merge changes from Dart. |
| 7 // https://code.google.com/p/dart/wiki/GettingTheSource | 7 // https://code.google.com/p/dart/wiki/GettingTheSource |
| 8 | 8 |
| 9 #include "vm/globals.h" // NOLINT | 9 #include "vm/globals.h" // NOLINT |
| 10 #if defined(TARGET_ARCH_ARM) | 10 #if defined(TARGET_ARCH_ARM) |
| (...skipping 230 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 241 | 241 |
| 242 void Assembler::sbc(Register rd, Register rn, Operand o, Condition cond) { | 242 void Assembler::sbc(Register rd, Register rn, Operand o, Condition cond) { |
| 243 EmitType01(cond, o.type(), SBC, 0, rn, rd, o); | 243 EmitType01(cond, o.type(), SBC, 0, rn, rd, o); |
| 244 } | 244 } |
| 245 | 245 |
| 246 | 246 |
| 247 void Assembler::sbcs(Register rd, Register rn, Operand o, Condition cond) { | 247 void Assembler::sbcs(Register rd, Register rn, Operand o, Condition cond) { |
| 248 EmitType01(cond, o.type(), SBC, 1, rn, rd, o); | 248 EmitType01(cond, o.type(), SBC, 1, rn, rd, o); |
| 249 } | 249 } |
| 250 | 250 |
| 251 | 251 #if 0 |
| 252 // Moved to ARM32::AssemblerARM32::rsc()f |
| 252 void Assembler::rsc(Register rd, Register rn, Operand o, Condition cond) { | 253 void Assembler::rsc(Register rd, Register rn, Operand o, Condition cond) { |
| 253 EmitType01(cond, o.type(), RSC, 0, rn, rd, o); | 254 EmitType01(cond, o.type(), RSC, 0, rn, rd, o); |
| 254 } | 255 } |
| 255 | 256 |
| 256 #if 0 | |
| 257 // Moved to ARM32::AssemblerARM32::tst() | 257 // Moved to ARM32::AssemblerARM32::tst() |
| 258 void Assembler::tst(Register rn, Operand o, Condition cond) { | 258 void Assembler::tst(Register rn, Operand o, Condition cond) { |
| 259 EmitType01(cond, o.type(), TST, 1, rn, R0, o); | 259 EmitType01(cond, o.type(), TST, 1, rn, R0, o); |
| 260 } | 260 } |
| 261 #endif | 261 #endif |
| 262 | 262 |
| 263 void Assembler::teq(Register rn, Operand o, Condition cond) { | 263 void Assembler::teq(Register rn, Operand o, Condition cond) { |
| 264 EmitType01(cond, o.type(), TEQ, 1, rn, R0, o); | 264 EmitType01(cond, o.type(), TEQ, 1, rn, R0, o); |
| 265 } | 265 } |
| 266 | 266 |
| (...skipping 3420 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3687 | 3687 |
| 3688 | 3688 |
| 3689 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3689 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3690 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3690 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3691 return fpu_reg_names[reg]; | 3691 return fpu_reg_names[reg]; |
| 3692 } | 3692 } |
| 3693 | 3693 |
| 3694 } // namespace dart | 3694 } // namespace dart |
| 3695 | 3695 |
| 3696 #endif // defined TARGET_ARCH_ARM | 3696 #endif // defined TARGET_ARCH_ARM |
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