PPC64: [turbofan] Changed TruncateFloat64ToInt64 to TryTruncateFloat64ToInt64.

src/ppc/simulator-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_PPC
 
@@ skipping 2898 matching lines @@
       return;
     }
     case FCTID: {
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       double frb_val = get_double_from_d_register(frb);
       int64_t frt_val;
       int64_t one = 1;  // work-around gcc
       int64_t kMinLongLong = (one << 63);
       int64_t kMaxLongLong = kMinLongLong - 1;
+      bool invalid_convert = false;
 
-      if (frb_val > kMaxLongLong) {
+      if (std::isnan(frb_val) || frb_val < kMinLongLong) {
+        frt_val = kMinLongLong;
+        invalid_convert = true;
+      } else if (frb_val > kMaxLongLong) {
         frt_val = kMaxLongLong;
-      } else if (frb_val < kMinLongLong) {
-        frt_val = kMinLongLong;
+        invalid_convert = true;
       } else {
         switch (fp_condition_reg_ & kFPRoundingModeMask) {
           case kRoundToZero:
             frt_val = (int64_t)frb_val;
             break;
           case kRoundToPlusInf:
             frt_val = (int64_t)std::ceil(frb_val);
             break;
           case kRoundToMinusInf:
             frt_val = (int64_t)std::floor(frb_val);
             break;
           default:
             frt_val = (int64_t)frb_val;
             UNIMPLEMENTED();  // Not used by V8.
             break;
         }
       }
       set_d_register(frt, frt_val);
+      if (invalid_convert) SetFPSCR(VXCVI);
       return;
     }
     case FCTIDZ: {
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       double frb_val = get_double_from_d_register(frb);
       int64_t frt_val;
       int64_t one = 1;  // work-around gcc
       int64_t kMinLongLong = (one << 63);
       int64_t kMaxLongLong = kMinLongLong - 1;
+      bool invalid_convert = false;
 
-      if (frb_val > kMaxLongLong) {
+      if (std::isnan(frb_val) || frb_val < kMinLongLong) {
+        frt_val = kMinLongLong;
+        invalid_convert = true;
+      } else if (frb_val > kMaxLongLong) {
         frt_val = kMaxLongLong;
-      } else if (frb_val < kMinLongLong) {
-        frt_val = kMinLongLong;
+        invalid_convert = true;
       } else {
         frt_val = (int64_t)frb_val;
       }
       set_d_register(frt, frt_val);
+      if (invalid_convert) SetFPSCR(VXCVI);
       return;
     }
     case FCTIDU: {
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       double frb_val = get_double_from_d_register(frb);
       uint64_t frt_val;
       uint64_t kMinLongLong = 0;
       uint64_t kMaxLongLong = kMinLongLong - 1;
+      bool invalid_convert = false;
 
-      if (frb_val > kMaxLongLong) {
+      if (std::isnan(frb_val) || frb_val < kMinLongLong) {
+        frt_val = kMinLongLong;
+        invalid_convert = true;
+      } else if (frb_val > kMaxLongLong) {
         frt_val = kMaxLongLong;
-      } else if (frb_val < kMinLongLong) {
-        frt_val = kMinLongLong;
+        invalid_convert = true;
       } else {
         switch (fp_condition_reg_ & kFPRoundingModeMask) {
           case kRoundToZero:
             frt_val = (uint64_t)frb_val;
             break;
           case kRoundToPlusInf:
             frt_val = (uint64_t)std::ceil(frb_val);
             break;
           case kRoundToMinusInf:
             frt_val = (uint64_t)std::floor(frb_val);
             break;
           default:
             frt_val = (uint64_t)frb_val;
             UNIMPLEMENTED();  // Not used by V8.
             break;
         }
       }
       set_d_register(frt, frt_val);
+      if (invalid_convert) SetFPSCR(VXCVI);
       return;
     }
     case FCTIDUZ: {
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       double frb_val = get_double_from_d_register(frb);
       uint64_t frt_val;
       uint64_t kMinLongLong = 0;
       uint64_t kMaxLongLong = kMinLongLong - 1;
+      bool invalid_convert = false;
 
-      if (frb_val > kMaxLongLong) {
+      if (std::isnan(frb_val) || frb_val < kMinLongLong) {
+        frt_val = kMinLongLong;
+        invalid_convert = true;
+      } else if (frb_val > kMaxLongLong) {
         frt_val = kMaxLongLong;
-      } else if (frb_val < kMinLongLong) {
-        frt_val = kMinLongLong;
+        invalid_convert = true;
       } else {
         frt_val = (uint64_t)frb_val;
       }
       set_d_register(frt, frt_val);
+      if (invalid_convert) SetFPSCR(VXCVI);
       return;
     }
     case FCTIW:
     case FCTIWZ: {
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       double frb_val = get_double_from_d_register(frb);
       int64_t frt_val;
       if (frb_val > kMaxInt) {
         frt_val = kMaxInt;
@@ skipping 76 matching lines @@
         // int flm = instr->Bits(24, 17);
       }
       return;
     }
     case MFFS: {
       int frt = instr->RTValue();
       int64_t lval = static_cast<int64_t>(fp_condition_reg_);
       set_d_register(frt, lval);
       return;
     }
+    case MCRFS: {
+      int bf = instr->Bits(25, 23);
+      int bfa = instr->Bits(20, 18);
+      int cr_shift = (7 - bf) * CRWIDTH;
+      int fp_shift = (7 - bfa) * CRWIDTH;
+      int field_val = (fp_condition_reg_ >> fp_shift) & 0xf;
+      condition_reg_ &= ~(0x0f << cr_shift);
+      condition_reg_ |= (field_val << cr_shift);
+      // Clear copied exception bits
+      switch (bfa) {
+        case 5:
+          ClearFPSCR(VXSOFT);
+          ClearFPSCR(VXSQRT);
+          ClearFPSCR(VXCVI);
+          break;
+        default:
+          UNIMPLEMENTED();
+          break;
+      }
+      return;
+    }
+    case MTFSB0: {
+      int bt = instr->Bits(25, 21);
+      ClearFPSCR(bt);
+      if (instr->Bit(0)) {  // RC bit set
+        UNIMPLEMENTED();
+      }
+      return;
+    }
+    case MTFSB1: {
+      int bt = instr->Bits(25, 21);
+      SetFPSCR(bt);
+      if (instr->Bit(0)) {  // RC bit set
+        UNIMPLEMENTED();
+      }
+      return;
+    }
     case FABS: {
       int frt = instr->RTValue();
       int frb = instr->RBValue();
       double frb_val = get_double_from_d_register(frb);
       double frt_val = std::fabs(frb_val);
       set_d_register_from_double(frt, frt_val);
       return;
     }
   }
   UNIMPLEMENTED();  // Not used by V8.
@@ skipping 891 matching lines @@
   uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
   uintptr_t address = *stack_slot;
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 #endif  // V8_TARGET_ARCH_PPC