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Issue 1515603002: PPC64: [turbofan] Changed TruncateFloat64ToInt64 to TryTruncateFloat64ToInt64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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1010 break; 1010 break;
1011 } 1011 }
1012 case FRIM: { 1012 case FRIM: {
1013 Format(instr, "frim. 'Dt, 'Db"); 1013 Format(instr, "frim. 'Dt, 'Db");
1014 break; 1014 break;
1015 } 1015 }
1016 case FNEG: { 1016 case FNEG: {
1017 Format(instr, "fneg'. 'Dt, 'Db"); 1017 Format(instr, "fneg'. 'Dt, 'Db");
1018 break; 1018 break;
1019 } 1019 }
1020 case MCRFS: {
1021 Format(instr, "mcrfs ?,?");
1022 break;
1023 }
1024 case MTFSB0: {
1025 Format(instr, "mtfsb0'. ?");
1026 break;
1027 }
1028 case MTFSB1: {
1029 Format(instr, "mtfsb1'. ?");
1030 break;
1031 }
1020 default: { 1032 default: {
1021 Unknown(instr); // not used by V8 1033 Unknown(instr); // not used by V8
1022 } 1034 }
1023 } 1035 }
1024 } 1036 }
1025 1037
1026 1038
1027 void Decoder::DecodeExt5(Instruction* instr) { 1039 void Decoder::DecodeExt5(Instruction* instr) {
1028 switch (instr->Bits(4, 2) << 2) { 1040 switch (instr->Bits(4, 2) << 2) {
1029 case RLDICL: { 1041 case RLDICL: {
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1445 pc += d.InstructionDecode(buffer, pc); 1457 pc += d.InstructionDecode(buffer, pc);
1446 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc, 1458 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc,
1447 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1459 *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1448 } 1460 }
1449 } 1461 }
1450 1462
1451 1463
1452 } // namespace disasm 1464 } // namespace disasm
1453 1465
1454 #endif // V8_TARGET_ARCH_PPC 1466 #endif // V8_TARGET_ARCH_PPC
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