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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1837 void Assembler::mtctr(Register src) { | 1837 void Assembler::mtctr(Register src) { |
1838 emit(EXT2 | MTSPR | src.code() * B21 | 288 << 11); // Ignore RC bit | 1838 emit(EXT2 | MTSPR | src.code() * B21 | 288 << 11); // Ignore RC bit |
1839 } | 1839 } |
1840 | 1840 |
1841 | 1841 |
1842 void Assembler::mtxer(Register src) { | 1842 void Assembler::mtxer(Register src) { |
1843 emit(EXT2 | MTSPR | src.code() * B21 | 32 << 11); | 1843 emit(EXT2 | MTSPR | src.code() * B21 | 32 << 11); |
1844 } | 1844 } |
1845 | 1845 |
1846 | 1846 |
1847 void Assembler::mcrfs(int bf, int bfa) { | 1847 void Assembler::mcrfs(CRegister cr, FPSCRBit bit) { |
| 1848 DCHECK(static_cast<int>(bit) < 32); |
| 1849 int bf = cr.code(); |
| 1850 int bfa = bit / CRWIDTH; |
1848 emit(EXT4 | MCRFS | bf * B23 | bfa * B18); | 1851 emit(EXT4 | MCRFS | bf * B23 | bfa * B18); |
1849 } | 1852 } |
1850 | 1853 |
1851 | 1854 |
1852 void Assembler::mfcr(Register dst) { emit(EXT2 | MFCR | dst.code() * B21); } | 1855 void Assembler::mfcr(Register dst) { emit(EXT2 | MFCR | dst.code() * B21); } |
1853 | 1856 |
1854 | 1857 |
1855 #if V8_TARGET_ARCH_PPC64 | 1858 #if V8_TARGET_ARCH_PPC64 |
1856 void Assembler::mffprd(Register dst, DoubleRegister src) { | 1859 void Assembler::mffprd(Register dst, DoubleRegister src) { |
1857 emit(EXT2 | MFVSRD | src.code() * B21 | dst.code() * B16); | 1860 emit(EXT2 | MFVSRD | src.code() * B21 | dst.code() * B16); |
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2212 frc.code() * B6 | rc); | 2215 frc.code() * B6 | rc); |
2213 } | 2216 } |
2214 | 2217 |
2215 | 2218 |
2216 void Assembler::fneg(const DoubleRegister frt, const DoubleRegister frb, | 2219 void Assembler::fneg(const DoubleRegister frt, const DoubleRegister frb, |
2217 RCBit rc) { | 2220 RCBit rc) { |
2218 emit(EXT4 | FNEG | frt.code() * B21 | frb.code() * B11 | rc); | 2221 emit(EXT4 | FNEG | frt.code() * B21 | frb.code() * B11 | rc); |
2219 } | 2222 } |
2220 | 2223 |
2221 | 2224 |
| 2225 void Assembler::mtfsb0(FPSCRBit bit, RCBit rc) { |
| 2226 DCHECK(static_cast<int>(bit) < 32); |
| 2227 int bt = bit; |
| 2228 emit(EXT4 | MTFSB0 | bt * B21 | rc); |
| 2229 } |
| 2230 |
| 2231 |
| 2232 void Assembler::mtfsb1(FPSCRBit bit, RCBit rc) { |
| 2233 DCHECK(static_cast<int>(bit) < 32); |
| 2234 int bt = bit; |
| 2235 emit(EXT4 | MTFSB1 | bt * B21 | rc); |
| 2236 } |
| 2237 |
| 2238 |
2222 void Assembler::mtfsfi(int bf, int immediate, RCBit rc) { | 2239 void Assembler::mtfsfi(int bf, int immediate, RCBit rc) { |
2223 emit(EXT4 | MTFSFI | bf * B23 | immediate * B12 | rc); | 2240 emit(EXT4 | MTFSFI | bf * B23 | immediate * B12 | rc); |
2224 } | 2241 } |
2225 | 2242 |
2226 | 2243 |
2227 void Assembler::mffs(const DoubleRegister frt, RCBit rc) { | 2244 void Assembler::mffs(const DoubleRegister frt, RCBit rc) { |
2228 emit(EXT4 | MFFS | frt.code() * B21 | rc); | 2245 emit(EXT4 | MFFS | frt.code() * B21 | rc); |
2229 } | 2246 } |
2230 | 2247 |
2231 | 2248 |
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2457 | 2474 |
2458 trampoline_ = Trampoline(pc_offset() - size, tracked_branch_count_); | 2475 trampoline_ = Trampoline(pc_offset() - size, tracked_branch_count_); |
2459 } | 2476 } |
2460 } | 2477 } |
2461 | 2478 |
2462 | 2479 |
2463 } // namespace internal | 2480 } // namespace internal |
2464 } // namespace v8 | 2481 } // namespace v8 |
2465 | 2482 |
2466 #endif // V8_TARGET_ARCH_PPC | 2483 #endif // V8_TARGET_ARCH_PPC |
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