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Unified Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 1513543003: [turbofan] Make MachineType a pair of enums. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Moar rebase Created 5 years ago
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Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index 777819a6dc38acadfe48f21528fd9c15ec7ad51d..43acaa027d8aefb772d280600fe3a5d6a7a7cc2d 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -303,29 +303,28 @@ void VisitMod(InstructionSelector* selector, Node* node, ArchOpcode div_opcode,
void InstructionSelector::VisitLoad(Node* node) {
- MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node));
- MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node));
+ LoadRepresentation load_rep = LoadRepresentationOf(node->op());
ArmOperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
ArchOpcode opcode;
- switch (rep) {
- case kRepFloat32:
+ switch (load_rep.representation()) {
+ case MachineRepresentation::kFloat32:
opcode = kArmVldrF32;
break;
- case kRepFloat64:
+ case MachineRepresentation::kFloat64:
opcode = kArmVldrF64;
break;
- case kRepBit: // Fall through.
- case kRepWord8:
- opcode = typ == kTypeUint32 ? kArmLdrb : kArmLdrsb;
+ case MachineRepresentation::kBit: // Fall through.
+ case MachineRepresentation::kWord8:
+ opcode = load_rep.IsUnsigned() ? kArmLdrb : kArmLdrsb;
break;
- case kRepWord16:
- opcode = typ == kTypeUint32 ? kArmLdrh : kArmLdrsh;
+ case MachineRepresentation::kWord16:
+ opcode = load_rep.IsUnsigned() ? kArmLdrh : kArmLdrsh;
break;
- case kRepTagged: // Fall through.
- case kRepWord32:
+ case MachineRepresentation::kTagged: // Fall through.
+ case MachineRepresentation::kWord32:
opcode = kArmLdr;
break;
default:
@@ -351,10 +350,10 @@ void InstructionSelector::VisitStore(Node* node) {
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
WriteBarrierKind write_barrier_kind = store_rep.write_barrier_kind();
- MachineType rep = RepresentationOf(store_rep.machine_type());
+ MachineRepresentation rep = store_rep.machine_type().representation();
if (write_barrier_kind != kNoWriteBarrier) {
- DCHECK_EQ(kRepTagged, rep);
+ DCHECK_EQ(MachineRepresentation::kTagged, rep);
InstructionOperand inputs[3];
size_t input_count = 0;
inputs[input_count++] = g.UseUniqueRegister(base);
@@ -385,21 +384,21 @@ void InstructionSelector::VisitStore(Node* node) {
} else {
ArchOpcode opcode;
switch (rep) {
- case kRepFloat32:
+ case MachineRepresentation::kFloat32:
opcode = kArmVstrF32;
break;
- case kRepFloat64:
+ case MachineRepresentation::kFloat64:
opcode = kArmVstrF64;
break;
- case kRepBit: // Fall through.
- case kRepWord8:
+ case MachineRepresentation::kBit: // Fall through.
+ case MachineRepresentation::kWord8:
opcode = kArmStrb;
break;
- case kRepWord16:
+ case MachineRepresentation::kWord16:
opcode = kArmStrh;
break;
- case kRepTagged: // Fall through.
- case kRepWord32:
+ case MachineRepresentation::kTagged: // Fall through.
+ case MachineRepresentation::kWord32:
opcode = kArmStr;
break;
default:
@@ -419,27 +418,26 @@ void InstructionSelector::VisitStore(Node* node) {
void InstructionSelector::VisitCheckedLoad(Node* node) {
- MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
- MachineType typ = TypeOf(OpParameter<MachineType>(node));
+ CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op());
ArmOperandGenerator g(this);
Node* const buffer = node->InputAt(0);
Node* const offset = node->InputAt(1);
Node* const length = node->InputAt(2);
ArchOpcode opcode;
- switch (rep) {
- case kRepWord8:
- opcode = typ == kTypeInt32 ? kCheckedLoadInt8 : kCheckedLoadUint8;
+ switch (load_rep.representation()) {
+ case MachineRepresentation::kWord8:
+ opcode = load_rep.IsSigned() ? kCheckedLoadInt8 : kCheckedLoadUint8;
break;
- case kRepWord16:
- opcode = typ == kTypeInt32 ? kCheckedLoadInt16 : kCheckedLoadUint16;
+ case MachineRepresentation::kWord16:
+ opcode = load_rep.IsSigned() ? kCheckedLoadInt16 : kCheckedLoadUint16;
break;
- case kRepWord32:
+ case MachineRepresentation::kWord32:
opcode = kCheckedLoadWord32;
break;
- case kRepFloat32:
+ case MachineRepresentation::kFloat32:
opcode = kCheckedLoadFloat32;
break;
- case kRepFloat64:
+ case MachineRepresentation::kFloat64:
opcode = kCheckedLoadFloat64;
break;
default:
@@ -457,7 +455,8 @@ void InstructionSelector::VisitCheckedLoad(Node* node) {
void InstructionSelector::VisitCheckedStore(Node* node) {
- MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
+ MachineRepresentation rep =
+ CheckedStoreRepresentationOf(node->op()).representation();
ArmOperandGenerator g(this);
Node* const buffer = node->InputAt(0);
Node* const offset = node->InputAt(1);
@@ -465,19 +464,19 @@ void InstructionSelector::VisitCheckedStore(Node* node) {
Node* const value = node->InputAt(3);
ArchOpcode opcode;
switch (rep) {
- case kRepWord8:
+ case MachineRepresentation::kWord8:
opcode = kCheckedStoreWord8;
break;
- case kRepWord16:
+ case MachineRepresentation::kWord16:
opcode = kCheckedStoreWord16;
break;
- case kRepWord32:
+ case MachineRepresentation::kWord32:
opcode = kCheckedStoreWord32;
break;
- case kRepFloat32:
+ case MachineRepresentation::kFloat32:
opcode = kCheckedStoreFloat32;
break;
- case kRepFloat64:
+ case MachineRepresentation::kFloat64:
opcode = kCheckedStoreFloat64;
break;
default:
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