[turbofan] Make MachineType a pair of enums.

test/unittests/compiler/mips64/instruction-selector-mips64-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
@@ skipping 23 matching lines @@
   uint32_t expected_size;
 };
 
 struct FPCmp {
   MachInst2 mi;
   FlagsCondition cond;
 };
 
 const FPCmp kFPCmpInstructions[] = {
     {{&RawMachineAssembler::Float64Equal, "Float64Equal", kMips64CmpD,
-      kMachFloat64},
+      MachineType::Float64()},
      kEqual},
     {{&RawMachineAssembler::Float64LessThan, "Float64LessThan", kMips64CmpD,
-      kMachFloat64},
+      MachineType::Float64()},
      kUnsignedLessThan},
     {{&RawMachineAssembler::Float64LessThanOrEqual, "Float64LessThanOrEqual",
-      kMips64CmpD, kMachFloat64},
+      kMips64CmpD, MachineType::Float64()},
      kUnsignedLessThanOrEqual},
     {{&RawMachineAssembler::Float64GreaterThan, "Float64GreaterThan",
-      kMips64CmpD, kMachFloat64},
+      kMips64CmpD, MachineType::Float64()},
      kUnsignedLessThan},
     {{&RawMachineAssembler::Float64GreaterThanOrEqual,
-      "Float64GreaterThanOrEqual", kMips64CmpD, kMachFloat64},
+      "Float64GreaterThanOrEqual", kMips64CmpD, MachineType::Float64()},
      kUnsignedLessThanOrEqual}};
 
 struct Conversion {
   // The machine_type field in MachInst1 represents the destination type.
   MachInst1 mi;
   MachineType src_machine_type;
 };
 
 
 // ----------------------------------------------------------------------------
 // Logical instructions.
 // ----------------------------------------------------------------------------
 
 
 const MachInst2 kLogicalInstructions[] = {
-    {&RawMachineAssembler::Word32And, "Word32And", kMips64And, kMachInt32},
-    {&RawMachineAssembler::Word64And, "Word64And", kMips64And, kMachInt64},
-    {&RawMachineAssembler::Word32Or, "Word32Or", kMips64Or, kMachInt32},
-    {&RawMachineAssembler::Word64Or, "Word64Or", kMips64Or, kMachInt64},
-    {&RawMachineAssembler::Word32Xor, "Word32Xor", kMips64Xor, kMachInt32},
-    {&RawMachineAssembler::Word64Xor, "Word64Xor", kMips64Xor, kMachInt64}};
+    {&RawMachineAssembler::Word32And, "Word32And", kMips64And,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64And, "Word64And", kMips64And,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Word32Or, "Word32Or", kMips64Or,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64Or, "Word64Or", kMips64Or,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Word32Xor, "Word32Xor", kMips64Xor,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64Xor, "Word64Xor", kMips64Xor,
+     MachineType::Int64()}};
 
 
 // ----------------------------------------------------------------------------
 // Shift instructions.
 // ----------------------------------------------------------------------------
 
 
 const MachInst2 kShiftInstructions[] = {
-    {&RawMachineAssembler::Word32Shl, "Word32Shl", kMips64Shl, kMachInt32},
-    {&RawMachineAssembler::Word64Shl, "Word64Shl", kMips64Dshl, kMachInt64},
-    {&RawMachineAssembler::Word32Shr, "Word32Shr", kMips64Shr, kMachInt32},
-    {&RawMachineAssembler::Word64Shr, "Word64Shr", kMips64Dshr, kMachInt64},
-    {&RawMachineAssembler::Word32Sar, "Word32Sar", kMips64Sar, kMachInt32},
-    {&RawMachineAssembler::Word64Sar, "Word64Sar", kMips64Dsar, kMachInt64},
-    {&RawMachineAssembler::Word32Ror, "Word32Ror", kMips64Ror, kMachInt32},
-    {&RawMachineAssembler::Word64Ror, "Word64Ror", kMips64Dror, kMachInt64}};
+    {&RawMachineAssembler::Word32Shl, "Word32Shl", kMips64Shl,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64Shl, "Word64Shl", kMips64Dshl,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Word32Shr, "Word32Shr", kMips64Shr,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64Shr, "Word64Shr", kMips64Dshr,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Word32Sar, "Word32Sar", kMips64Sar,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64Sar, "Word64Sar", kMips64Dsar,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Word32Ror, "Word32Ror", kMips64Ror,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Word64Ror, "Word64Ror", kMips64Dror,
+     MachineType::Int64()}};
 
 
 // ----------------------------------------------------------------------------
 // MUL/DIV instructions.
 // ----------------------------------------------------------------------------
 
 
 const MachInst2 kMulDivInstructions[] = {
-    {&RawMachineAssembler::Int32Mul, "Int32Mul", kMips64Mul, kMachInt32},
-    {&RawMachineAssembler::Int32Div, "Int32Div", kMips64Div, kMachInt32},
-    {&RawMachineAssembler::Uint32Div, "Uint32Div", kMips64DivU, kMachUint32},
-    {&RawMachineAssembler::Int64Mul, "Int64Mul", kMips64Dmul, kMachInt64},
-    {&RawMachineAssembler::Int64Div, "Int64Div", kMips64Ddiv, kMachInt64},
-    {&RawMachineAssembler::Uint64Div, "Uint64Div", kMips64DdivU, kMachUint64},
-    {&RawMachineAssembler::Float64Mul, "Float64Mul", kMips64MulD, kMachFloat64},
+    {&RawMachineAssembler::Int32Mul, "Int32Mul", kMips64Mul,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Int32Div, "Int32Div", kMips64Div,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Uint32Div, "Uint32Div", kMips64DivU,
+     MachineType::Uint32()},
+    {&RawMachineAssembler::Int64Mul, "Int64Mul", kMips64Dmul,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Int64Div, "Int64Div", kMips64Ddiv,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Uint64Div, "Uint64Div", kMips64DdivU,
+     MachineType::Uint64()},
+    {&RawMachineAssembler::Float64Mul, "Float64Mul", kMips64MulD,
+     MachineType::Float64()},
     {&RawMachineAssembler::Float64Div, "Float64Div", kMips64DivD,
-     kMachFloat64}};
+     MachineType::Float64()}};
 
 
 // ----------------------------------------------------------------------------
 // MOD instructions.
 // ----------------------------------------------------------------------------
 
 
 const MachInst2 kModInstructions[] = {
-    {&RawMachineAssembler::Int32Mod, "Int32Mod", kMips64Mod, kMachInt32},
-    {&RawMachineAssembler::Uint32Mod, "Uint32Mod", kMips64ModU, kMachInt32},
+    {&RawMachineAssembler::Int32Mod, "Int32Mod", kMips64Mod,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Uint32Mod, "Uint32Mod", kMips64ModU,
+     MachineType::Int32()},
     {&RawMachineAssembler::Float64Mod, "Float64Mod", kMips64ModD,
-     kMachFloat64}};
+     MachineType::Float64()}};
 
 
 // ----------------------------------------------------------------------------
 // Arithmetic FPU instructions.
 // ----------------------------------------------------------------------------
 
 
 const MachInst2 kFPArithInstructions[] = {
-    {&RawMachineAssembler::Float64Add, "Float64Add", kMips64AddD, kMachFloat64},
+    {&RawMachineAssembler::Float64Add, "Float64Add", kMips64AddD,
+     MachineType::Float64()},
     {&RawMachineAssembler::Float64Sub, "Float64Sub", kMips64SubD,
-     kMachFloat64}};
+     MachineType::Float64()}};
 
 
 // ----------------------------------------------------------------------------
 // IntArithTest instructions, two nodes.
 // ----------------------------------------------------------------------------
 
 
 const MachInst2 kAddSubInstructions[] = {
-    {&RawMachineAssembler::Int32Add, "Int32Add", kMips64Add, kMachInt32},
-    {&RawMachineAssembler::Int64Add, "Int64Add", kMips64Dadd, kMachInt64},
-    {&RawMachineAssembler::Int32Sub, "Int32Sub", kMips64Sub, kMachInt32},
-    {&RawMachineAssembler::Int64Sub, "Int64Sub", kMips64Dsub, kMachInt64}};
+    {&RawMachineAssembler::Int32Add, "Int32Add", kMips64Add,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Int64Add, "Int64Add", kMips64Dadd,
+     MachineType::Int64()},
+    {&RawMachineAssembler::Int32Sub, "Int32Sub", kMips64Sub,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Int64Sub, "Int64Sub", kMips64Dsub,
+     MachineType::Int64()}};
 
 
 // ----------------------------------------------------------------------------
 // IntArithTest instructions, one node.
 // ----------------------------------------------------------------------------
 
 
 const MachInst1 kAddSubOneInstructions[] = {
-    {&RawMachineAssembler::Int32Neg, "Int32Neg", kMips64Sub, kMachInt32},
-    {&RawMachineAssembler::Int64Neg, "Int64Neg", kMips64Dsub, kMachInt64}};
+    {&RawMachineAssembler::Int32Neg, "Int32Neg", kMips64Sub,
+     MachineType::Int32()},
+    {&RawMachineAssembler::Int64Neg, "Int64Neg", kMips64Dsub,
+     MachineType::Int64()}};
 
 
 // ----------------------------------------------------------------------------
 // Arithmetic compare instructions.
 // ----------------------------------------------------------------------------
 
 
 const IntCmp kCmpInstructions[] = {
-    {{&RawMachineAssembler::WordEqual, "WordEqual", kMips64Cmp, kMachInt64},
+    {{&RawMachineAssembler::WordEqual, "WordEqual", kMips64Cmp,
+      MachineType::Int64()},
      1U},
     {{&RawMachineAssembler::WordNotEqual, "WordNotEqual", kMips64Cmp,
-      kMachInt64},
+      MachineType::Int64()},
      1U},
-    {{&RawMachineAssembler::Word32Equal, "Word32Equal", kMips64Cmp, kMachInt32},
+    {{&RawMachineAssembler::Word32Equal, "Word32Equal", kMips64Cmp,
+      MachineType::Int32()},
      1U},
     {{&RawMachineAssembler::Word32NotEqual, "Word32NotEqual", kMips64Cmp,
-      kMachInt32},
+      MachineType::Int32()},
      1U},
     {{&RawMachineAssembler::Int32LessThan, "Int32LessThan", kMips64Cmp,
-      kMachInt32},
+      MachineType::Int32()},
      1U},
     {{&RawMachineAssembler::Int32LessThanOrEqual, "Int32LessThanOrEqual",
-      kMips64Cmp, kMachInt32},
+      kMips64Cmp, MachineType::Int32()},
      1U},
     {{&RawMachineAssembler::Int32GreaterThan, "Int32GreaterThan", kMips64Cmp,
-      kMachInt32},
+      MachineType::Int32()},
      1U},
     {{&RawMachineAssembler::Int32GreaterThanOrEqual, "Int32GreaterThanOrEqual",
-      kMips64Cmp, kMachInt32},
+      kMips64Cmp, MachineType::Int32()},
      1U},
     {{&RawMachineAssembler::Uint32LessThan, "Uint32LessThan", kMips64Cmp,
-      kMachUint32},
+      MachineType::Uint32()},
      1U},
     {{&RawMachineAssembler::Uint32LessThanOrEqual, "Uint32LessThanOrEqual",
-      kMips64Cmp, kMachUint32},
+      kMips64Cmp, MachineType::Uint32()},
      1U}};
 
 
 // ----------------------------------------------------------------------------
 // Conversion instructions.
 // ----------------------------------------------------------------------------
 
 const Conversion kConversionInstructions[] = {
     // Conversion instructions are related to machine_operator.h:
     // FPU conversions:
     // Convert representation of integers between float64 and int32/uint32.
     // The precise rounding mode and handling of out of range inputs are *not*
     // defined for these operators, since they are intended only for use with
     // integers.
     // mips instructions:
     // mtc1, cvt.d.w
     {{&RawMachineAssembler::ChangeInt32ToFloat64, "ChangeInt32ToFloat64",
-      kMips64CvtDW, kMachFloat64},
-     kMachInt32},
+      kMips64CvtDW, MachineType::Float64()},
+     MachineType::Int32()},
 
     // mips instructions:
     // cvt.d.uw
     {{&RawMachineAssembler::ChangeUint32ToFloat64, "ChangeUint32ToFloat64",
-      kMips64CvtDUw, kMachFloat64},
-     kMachInt32},
+      kMips64CvtDUw, MachineType::Float64()},
+     MachineType::Int32()},
 
     // mips instructions:
     // mfc1, trunc double to word, for more details look at mips macro
     // asm and mips asm file
     {{&RawMachineAssembler::ChangeFloat64ToInt32, "ChangeFloat64ToInt32",
-      kMips64TruncWD, kMachFloat64},
-     kMachInt32},
+      kMips64TruncWD, MachineType::Float64()},
+     MachineType::Int32()},
 
     // mips instructions:
     // trunc double to unsigned word, for more details look at mips macro
     // asm and mips asm file
     {{&RawMachineAssembler::ChangeFloat64ToUint32, "ChangeFloat64ToUint32",
-      kMips64TruncUwD, kMachFloat64},
-     kMachInt32}};
+      kMips64TruncUwD, MachineType::Float64()},
+     MachineType::Int32()}};
 
 const Conversion kFloat64RoundInstructions[] = {
     {{&RawMachineAssembler::Float64RoundUp, "Float64RoundUp", kMips64CeilWD,
-      kMachFloat64},
-     kMachInt32},
+      MachineType::Float64()},
+     MachineType::Int32()},
     {{&RawMachineAssembler::Float64RoundDown, "Float64RoundDown",
-      kMips64FloorWD, kMachFloat64},
-     kMachInt32},
+      kMips64FloorWD, MachineType::Float64()},
+     MachineType::Int32()},
     {{&RawMachineAssembler::Float64RoundTiesEven, "Float64RoundTiesEven",
-      kMips64RoundWD, kMachFloat64},
-     kMachInt32},
+      kMips64RoundWD, MachineType::Float64()},
+     MachineType::Int32()},
     {{&RawMachineAssembler::Float64RoundTruncate, "Float64RoundTruncate",
-      kMips64TruncWD, kMachFloat64},
-     kMachInt32}};
+      kMips64TruncWD, MachineType::Float64()},
+     MachineType::Int32()}};
 
 }  // namespace
 
 
 typedef InstructionSelectorTestWithParam<FPCmp> InstructionSelectorFPCmpTest;
 
 TEST_P(InstructionSelectorFPCmpTest, Parameter) {
   const FPCmp cmp = GetParam();
-  StreamBuilder m(this, kMachInt32, cmp.mi.machine_type, cmp.mi.machine_type);
+  StreamBuilder m(this, MachineType::Int32(), cmp.mi.machine_type,
+                  cmp.mi.machine_type);
   m.Return((m.*cmp.mi.constructor)(m.Parameter(0), m.Parameter(1)));
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(cmp.mi.arch_opcode, s[0]->arch_opcode());
   EXPECT_EQ(2U, s[0]->InputCount());
   EXPECT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(kFlags_set, s[0]->flags_mode());
   EXPECT_EQ(cmp.cond, s[0]->flags_condition());
 }
 
@@ skipping 23 matching lines @@
 
 // ----------------------------------------------------------------------------
 // Shift instructions.
 // ----------------------------------------------------------------------------
 typedef InstructionSelectorTestWithParam<MachInst2>
     InstructionSelectorShiftTest;
 
 TEST_P(InstructionSelectorShiftTest, Immediate) {
   const MachInst2 dpi = GetParam();
   const MachineType type = dpi.machine_type;
-  TRACED_FORRANGE(int32_t, imm, 0, (ElementSizeOf(type) * 8) - 1) {
+  TRACED_FORRANGE(int32_t, imm, 0,
+                  ((1 << ElementSizeLog2Of(type.representation())) * 8) - 1) {
     StreamBuilder m(this, type, type);
     m.Return((m.*dpi.constructor)(m.Parameter(0), m.Int32Constant(imm)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_TRUE(s[0]->InputAt(1)->IsImmediate());
     EXPECT_EQ(imm, s.ToInt32(s[0]->InputAt(1)));
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorShiftTest,
                         ::testing::ValuesIn(kShiftInstructions));
 
 TEST_F(InstructionSelectorTest, Word32ShrWithWord32AndWithImmediate) {
   // The available shift operand range is `0 <= imm < 32`, but we also test
   // that immediates outside this range are handled properly (modulo-32).
   TRACED_FORRANGE(int32_t, shift, -32, 63) {
     int32_t lsb = shift & 0x1f;
     TRACED_FORRANGE(int32_t, width, 1, 32 - lsb) {
       uint32_t jnk = rng()->NextInt();
       jnk = (lsb > 0) ? (jnk >> (32 - lsb)) : 0;
       uint32_t msk = ((0xffffffffu >> (32 - width)) << lsb) | jnk;
-      StreamBuilder m(this, kMachInt32, kMachInt32);
+      StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
       m.Return(m.Word32Shr(m.Word32And(m.Parameter(0), m.Int32Constant(msk)),
                            m.Int32Constant(shift)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Ext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
       EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2)));
     }
   }
   TRACED_FORRANGE(int32_t, shift, -32, 63) {
     int32_t lsb = shift & 0x1f;
     TRACED_FORRANGE(int32_t, width, 1, 32 - lsb) {
       uint32_t jnk = rng()->NextInt();
       jnk = (lsb > 0) ? (jnk >> (32 - lsb)) : 0;
       uint32_t msk = ((0xffffffffu >> (32 - width)) << lsb) | jnk;
-      StreamBuilder m(this, kMachInt32, kMachInt32);
+      StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
       m.Return(m.Word32Shr(m.Word32And(m.Int32Constant(msk), m.Parameter(0)),
                            m.Int32Constant(shift)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Ext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
       EXPECT_EQ(width, s.ToInt32(s[0]->InputAt(2)));
     }
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word64ShrWithWord64AndWithImmediate) {
   // The available shift operand range is `0 <= imm < 64`, but we also test
   // that immediates outside this range are handled properly (modulo-64).
   TRACED_FORRANGE(int32_t, shift, -64, 127) {
     int32_t lsb = shift & 0x3f;
     TRACED_FORRANGE(int32_t, width, 1, 64 - lsb) {
       uint64_t jnk = rng()->NextInt64();
       jnk = (lsb > 0) ? (jnk >> (64 - lsb)) : 0;
       uint64_t msk =
           ((V8_UINT64_C(0xffffffffffffffff) >> (64 - width)) << lsb) | jnk;
-      StreamBuilder m(this, kMachInt64, kMachInt64);
+      StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
       m.Return(m.Word64Shr(m.Word64And(m.Parameter(0), m.Int64Constant(msk)),
                            m.Int64Constant(shift)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Dext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
       EXPECT_EQ(width, s.ToInt64(s[0]->InputAt(2)));
     }
   }
   TRACED_FORRANGE(int32_t, shift, -64, 127) {
     int32_t lsb = shift & 0x3f;
     TRACED_FORRANGE(int32_t, width, 1, 64 - lsb) {
       uint64_t jnk = rng()->NextInt64();
       jnk = (lsb > 0) ? (jnk >> (64 - lsb)) : 0;
       uint64_t msk =
           ((V8_UINT64_C(0xffffffffffffffff) >> (64 - width)) << lsb) | jnk;
-      StreamBuilder m(this, kMachInt64, kMachInt64);
+      StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
       m.Return(m.Word64Shr(m.Word64And(m.Int64Constant(msk), m.Parameter(0)),
                            m.Int64Constant(shift)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Dext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
       EXPECT_EQ(width, s.ToInt64(s[0]->InputAt(2)));
     }
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word32AndToClearBits) {
   TRACED_FORRANGE(int32_t, shift, 1, 31) {
     int32_t mask = ~((1 << shift) - 1);
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32And(m.Parameter(0), m.Int32Constant(mask)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Ins, s[0]->arch_opcode());
     ASSERT_EQ(3U, s[0]->InputCount());
     EXPECT_EQ(0, s.ToInt32(s[0]->InputAt(1)));
     EXPECT_EQ(shift, s.ToInt32(s[0]->InputAt(2)));
   }
   TRACED_FORRANGE(int32_t, shift, 1, 31) {
     int32_t mask = ~((1 << shift) - 1);
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32And(m.Int32Constant(mask), m.Parameter(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Ins, s[0]->arch_opcode());
     ASSERT_EQ(3U, s[0]->InputCount());
     EXPECT_EQ(0, s.ToInt32(s[0]->InputAt(1)));
     EXPECT_EQ(shift, s.ToInt32(s[0]->InputAt(2)));
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word64AndToClearBits) {
   TRACED_FORRANGE(int32_t, shift, 1, 31) {
     int64_t mask = ~((1 << shift) - 1);
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64And(m.Parameter(0), m.Int64Constant(mask)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Dins, s[0]->arch_opcode());
     ASSERT_EQ(3U, s[0]->InputCount());
     EXPECT_EQ(0, s.ToInt32(s[0]->InputAt(1)));
     EXPECT_EQ(shift, s.ToInt32(s[0]->InputAt(2)));
   }
   TRACED_FORRANGE(int32_t, shift, 1, 31) {
     int64_t mask = ~((1 << shift) - 1);
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64And(m.Int64Constant(mask), m.Parameter(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Dins, s[0]->arch_opcode());
     ASSERT_EQ(3U, s[0]->InputCount());
     EXPECT_EQ(0, s.ToInt32(s[0]->InputAt(1)));
     EXPECT_EQ(shift, s.ToInt32(s[0]->InputAt(2)));
   }
 }
 
@@ skipping 16 matching lines @@
   EXPECT_EQ(2U, s[0]->InputCount());
   EXPECT_EQ(1U, s[0]->OutputCount());
 }
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorLogicalTest,
                         ::testing::ValuesIn(kLogicalInstructions));
 
 
 TEST_F(InstructionSelectorTest, Word64XorMinusOneWithParameter) {
   {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64Xor(m.Parameter(0), m.Int64Constant(-1)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
   {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64Xor(m.Int64Constant(-1), m.Parameter(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word32XorMinusOneWithParameter) {
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32Xor(m.Parameter(0), m.Int32Constant(-1)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32Xor(m.Int32Constant(-1), m.Parameter(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word64XorMinusOneWithWord64Or) {
   {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64Xor(m.Word64Or(m.Parameter(0), m.Parameter(0)),
                          m.Int64Constant(-1)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
   {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64Xor(m.Int64Constant(-1),
                          m.Word64Or(m.Parameter(0), m.Parameter(0))));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word32XorMinusOneWithWord32Or) {
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32Xor(m.Word32Or(m.Parameter(0), m.Parameter(0)),
                          m.Int32Constant(-1)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32Xor(m.Int32Constant(-1),
                          m.Word32Or(m.Parameter(0), m.Parameter(0))));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Nor, s[0]->arch_opcode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word32AndWithImmediateWithWord32Shr) {
   // The available shift operand range is `0 <= imm < 32`, but we also test
   // that immediates outside this range are handled properly (modulo-32).
   TRACED_FORRANGE(int32_t, shift, -32, 63) {
     int32_t lsb = shift & 0x1f;
     TRACED_FORRANGE(int32_t, width, 1, 31) {
       uint32_t msk = (1 << width) - 1;
-      StreamBuilder m(this, kMachInt32, kMachInt32);
+      StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
       m.Return(m.Word32And(m.Word32Shr(m.Parameter(0), m.Int32Constant(shift)),
                            m.Int32Constant(msk)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Ext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
       int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width;
       EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2)));
     }
   }
   TRACED_FORRANGE(int32_t, shift, -32, 63) {
     int32_t lsb = shift & 0x1f;
     TRACED_FORRANGE(int32_t, width, 1, 31) {
       uint32_t msk = (1 << width) - 1;
-      StreamBuilder m(this, kMachInt32, kMachInt32);
+      StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
       m.Return(
           m.Word32And(m.Int32Constant(msk),
                       m.Word32Shr(m.Parameter(0), m.Int32Constant(shift))));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Ext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
       int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width;
       EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2)));
     }
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word64AndWithImmediateWithWord64Shr) {
   // The available shift operand range is `0 <= imm < 64`, but we also test
   // that immediates outside this range are handled properly (modulo-64).
   TRACED_FORRANGE(int64_t, shift, -64, 127) {
     int64_t lsb = shift & 0x3f;
     TRACED_FORRANGE(int64_t, width, 1, 63) {
       uint64_t msk = (V8_UINT64_C(1) << width) - 1;
-      StreamBuilder m(this, kMachInt64, kMachInt64);
+      StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
       m.Return(m.Word64And(m.Word64Shr(m.Parameter(0), m.Int64Constant(shift)),
                            m.Int64Constant(msk)));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Dext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
       int64_t actual_width = (lsb + width > 64) ? (64 - lsb) : width;
       EXPECT_EQ(actual_width, s.ToInt64(s[0]->InputAt(2)));
     }
   }
   TRACED_FORRANGE(int64_t, shift, -64, 127) {
     int64_t lsb = shift & 0x3f;
     TRACED_FORRANGE(int64_t, width, 1, 63) {
       uint64_t msk = (V8_UINT64_C(1) << width) - 1;
-      StreamBuilder m(this, kMachInt64, kMachInt64);
+      StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
       m.Return(
           m.Word64And(m.Int64Constant(msk),
                       m.Word64Shr(m.Parameter(0), m.Int64Constant(shift))));
       Stream s = m.Build();
       ASSERT_EQ(1U, s.size());
       EXPECT_EQ(kMips64Dext, s[0]->arch_opcode());
       ASSERT_EQ(3U, s[0]->InputCount());
       EXPECT_EQ(lsb, s.ToInt64(s[0]->InputAt(1)));
       int64_t actual_width = (lsb + width > 64) ? (64 - lsb) : width;
       EXPECT_EQ(actual_width, s.ToInt64(s[0]->InputAt(2)));
     }
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word32ShlWithWord32And) {
   TRACED_FORRANGE(int32_t, shift, 0, 30) {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     Node* const p0 = m.Parameter(0);
     Node* const r =
         m.Word32Shl(m.Word32And(p0, m.Int32Constant((1 << (31 - shift)) - 1)),
                     m.Int32Constant(shift + 1));
     m.Return(r);
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Shl, s[0]->arch_opcode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
     ASSERT_EQ(1U, s[0]->OutputCount());
     EXPECT_EQ(s.ToVreg(r), s.ToVreg(s[0]->Output()));
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word64ShlWithWord64And) {
   TRACED_FORRANGE(int32_t, shift, 0, 62) {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     Node* const p0 = m.Parameter(0);
     Node* const r =
         m.Word64Shl(m.Word64And(p0, m.Int64Constant((1L << (63 - shift)) - 1)),
                     m.Int64Constant(shift + 1));
     m.Return(r);
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Dshl, s[0]->arch_opcode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
@@ skipping 125 matching lines @@
   EXPECT_EQ(1U, s[0]->InputCount());
   EXPECT_EQ(1U, s[0]->OutputCount());
 }
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
                         InstructionSelectorConversionTest,
                         ::testing::ValuesIn(kConversionInstructions));
 
 TEST_F(InstructionSelectorTest, ChangesFromToSmi) {
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.TruncateInt64ToInt32(
         m.Word64Sar(m.Parameter(0), m.Int32Constant(32))));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Dsar, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(
         m.Word64Shl(m.ChangeInt32ToInt64(m.Parameter(0)), m.Int32Constant(32)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Dshl, s[0]->arch_opcode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
@@ skipping 15 matching lines @@
   }
 }
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
                         CombineChangeFloat64ToInt32WithRoundFloat64,
                         ::testing::ValuesIn(kFloat64RoundInstructions));
 
 
 TEST_F(InstructionSelectorTest, CombineShiftsWithMul) {
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Int32Mul(m.Word64Sar(m.Parameter(0), m.Int32Constant(32)),
                         m.Word64Sar(m.Parameter(0), m.Int32Constant(32))));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64DMulHigh, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, CombineShiftsWithDivMod) {
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Int32Div(m.Word64Sar(m.Parameter(0), m.Int32Constant(32)),
                         m.Word64Sar(m.Parameter(0), m.Int32Constant(32))));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Ddiv, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Int32Mod(m.Word64Sar(m.Parameter(0), m.Int32Constant(32)),
                         m.Word64Sar(m.Parameter(0), m.Int32Constant(32))));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Dmod, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 
 // ----------------------------------------------------------------------------
 // Loads and stores.
 // ----------------------------------------------------------------------------
 
 
 namespace {
 
 struct MemoryAccess {
   MachineType type;
   ArchOpcode load_opcode;
   ArchOpcode store_opcode;
 };
 
 static const MemoryAccess kMemoryAccesses[] = {
-    {kMachInt8, kMips64Lb, kMips64Sb},
-    {kMachUint8, kMips64Lbu, kMips64Sb},
-    {kMachInt16, kMips64Lh, kMips64Sh},
-    {kMachUint16, kMips64Lhu, kMips64Sh},
-    {kMachInt32, kMips64Lw, kMips64Sw},
-    {kMachFloat32, kMips64Lwc1, kMips64Swc1},
-    {kMachFloat64, kMips64Ldc1, kMips64Sdc1},
-    {kMachInt64, kMips64Ld, kMips64Sd}};
+    {MachineType::Int8(), kMips64Lb, kMips64Sb},
+    {MachineType::Uint8(), kMips64Lbu, kMips64Sb},
+    {MachineType::Int16(), kMips64Lh, kMips64Sh},
+    {MachineType::Uint16(), kMips64Lhu, kMips64Sh},
+    {MachineType::Int32(), kMips64Lw, kMips64Sw},
+    {MachineType::Float32(), kMips64Lwc1, kMips64Swc1},
+    {MachineType::Float64(), kMips64Ldc1, kMips64Sdc1},
+    {MachineType::Int64(), kMips64Ld, kMips64Sd}};
 
 
 struct MemoryAccessImm {
   MachineType type;
   ArchOpcode load_opcode;
   ArchOpcode store_opcode;
   bool (InstructionSelectorTest::Stream::*val_predicate)(
       const InstructionOperand*) const;
   const int32_t immediates[40];
 };
@@ skipping 18 matching lines @@
   return os << acc.type;
 }
 
 
 // ----------------------------------------------------------------------------
 // Loads and stores immediate values
 // ----------------------------------------------------------------------------
 
 
 const MemoryAccessImm kMemoryAccessesImm[] = {
-    {kMachInt8,
+    {MachineType::Int8(),
      kMips64Lb,
      kMips64Sb,
      &InstructionSelectorTest::Stream::IsInteger,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachUint8,
+    {MachineType::Uint8(),
      kMips64Lbu,
      kMips64Sb,
      &InstructionSelectorTest::Stream::IsInteger,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachInt16,
+    {MachineType::Int16(),
      kMips64Lh,
      kMips64Sh,
      &InstructionSelectorTest::Stream::IsInteger,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachUint16,
+    {MachineType::Uint16(),
      kMips64Lhu,
      kMips64Sh,
      &InstructionSelectorTest::Stream::IsInteger,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachInt32,
+    {MachineType::Int32(),
      kMips64Lw,
      kMips64Sw,
      &InstructionSelectorTest::Stream::IsInteger,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachFloat32,
+    {MachineType::Float32(),
      kMips64Lwc1,
      kMips64Swc1,
      &InstructionSelectorTest::Stream::IsDouble,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachFloat64,
+    {MachineType::Float64(),
      kMips64Ldc1,
      kMips64Sdc1,
      &InstructionSelectorTest::Stream::IsDouble,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}},
-    {kMachInt64,
+    {MachineType::Int64(),
      kMips64Ld,
      kMips64Sd,
      &InstructionSelectorTest::Stream::IsInteger,
      {-4095, -3340, -3231, -3224, -3088, -1758, -1203, -123, -117, -91, -89,
       -87, -86, -82, -44, -23, -3, 0, 7, 10, 39, 52, 69, 71, 91, 92, 107, 109,
       115, 124, 286, 655, 1362, 1569, 2587, 3067, 3096, 3462, 3510, 4095}}};
 
 
 const MemoryAccessImm1 kMemoryAccessImmMoreThan16bit[] = {
-    {kMachInt8,
+    {MachineType::Int8(),
      kMips64Lb,
      kMips64Sb,
      &InstructionSelectorTest::Stream::IsInteger,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachInt8,
+    {MachineType::Int8(),
      kMips64Lbu,
      kMips64Sb,
      &InstructionSelectorTest::Stream::IsInteger,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachInt16,
+    {MachineType::Int16(),
      kMips64Lh,
      kMips64Sh,
      &InstructionSelectorTest::Stream::IsInteger,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachInt16,
+    {MachineType::Int16(),
      kMips64Lhu,
      kMips64Sh,
      &InstructionSelectorTest::Stream::IsInteger,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachInt32,
+    {MachineType::Int32(),
      kMips64Lw,
      kMips64Sw,
      &InstructionSelectorTest::Stream::IsInteger,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachFloat32,
+    {MachineType::Float32(),
      kMips64Lwc1,
      kMips64Swc1,
      &InstructionSelectorTest::Stream::IsDouble,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachFloat64,
+    {MachineType::Float64(),
      kMips64Ldc1,
      kMips64Sdc1,
      &InstructionSelectorTest::Stream::IsDouble,
      {-65000, -55000, 32777, 55000, 65000}},
-    {kMachInt64,
+    {MachineType::Int64(),
      kMips64Ld,
      kMips64Sd,
      &InstructionSelectorTest::Stream::IsInteger,
      {-65000, -55000, 32777, 55000, 65000}}};
 
 }  // namespace
 
 
 typedef InstructionSelectorTestWithParam<MemoryAccess>
     InstructionSelectorMemoryAccessTest;
 
 TEST_P(InstructionSelectorMemoryAccessTest, LoadWithParameters) {
   const MemoryAccess memacc = GetParam();
-  StreamBuilder m(this, memacc.type, kMachPtr, kMachInt32);
+  StreamBuilder m(this, memacc.type, MachineType::Pointer(),
+                  MachineType::Int32());
   m.Return(m.Load(memacc.type, m.Parameter(0)));
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
   EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
 }
 
 
 TEST_P(InstructionSelectorMemoryAccessTest, StoreWithParameters) {
   const MemoryAccess memacc = GetParam();
-  StreamBuilder m(this, kMachInt32, kMachPtr, kMachInt32, memacc.type);
+  StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                  MachineType::Int32(), memacc.type);
   m.Store(memacc.type, m.Parameter(0), m.Parameter(1), kNoWriteBarrier);
   m.Return(m.Int32Constant(0));
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
   EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
 }
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
                         InstructionSelectorMemoryAccessTest,
                         ::testing::ValuesIn(kMemoryAccesses));
 
 
 // ----------------------------------------------------------------------------
 // Load immediate.
 // ----------------------------------------------------------------------------
 
 
 typedef InstructionSelectorTestWithParam<MemoryAccessImm>
     InstructionSelectorMemoryAccessImmTest;
 
 TEST_P(InstructionSelectorMemoryAccessImmTest, LoadWithImmediateIndex) {
   const MemoryAccessImm memacc = GetParam();
   TRACED_FOREACH(int32_t, index, memacc.immediates) {
-    StreamBuilder m(this, memacc.type, kMachPtr);
+    StreamBuilder m(this, memacc.type, MachineType::Pointer());
     m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(memacc.load_opcode, s[0]->arch_opcode());
     EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
     EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
     ASSERT_EQ(1U, s[0]->OutputCount());
     EXPECT_TRUE((s.*memacc.val_predicate)(s[0]->Output()));
   }
 }
 
 
 // ----------------------------------------------------------------------------
 // Store immediate.
 // ----------------------------------------------------------------------------
 
 
 TEST_P(InstructionSelectorMemoryAccessImmTest, StoreWithImmediateIndex) {
   const MemoryAccessImm memacc = GetParam();
   TRACED_FOREACH(int32_t, index, memacc.immediates) {
-    StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    memacc.type);
     m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
             kNoWriteBarrier);
     m.Return(m.Int32Constant(0));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(memacc.store_opcode, s[0]->arch_opcode());
     EXPECT_EQ(kMode_MRI, s[0]->addressing_mode());
     ASSERT_EQ(3U, s[0]->InputCount());
     ASSERT_EQ(InstructionOperand::IMMEDIATE, s[0]->InputAt(1)->kind());
     EXPECT_EQ(index, s.ToInt32(s[0]->InputAt(1)));
@@ skipping 11 matching lines @@
 // ----------------------------------------------------------------------------
 
 
 typedef InstructionSelectorTestWithParam<MemoryAccessImm1>
     InstructionSelectorMemoryAccessImmMoreThan16bitTest;
 
 TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
        LoadWithImmediateIndex) {
   const MemoryAccessImm1 memacc = GetParam();
   TRACED_FOREACH(int32_t, index, memacc.immediates) {
-    StreamBuilder m(this, memacc.type, kMachPtr);
+    StreamBuilder m(this, memacc.type, MachineType::Pointer());
     m.Return(m.Load(memacc.type, m.Parameter(0), m.Int32Constant(index)));
     Stream s = m.Build();
     ASSERT_EQ(2U, s.size());
     // kMips64Dadd is expected opcode
     // size more than 16 bits wide
     EXPECT_EQ(kMips64Dadd, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 TEST_P(InstructionSelectorMemoryAccessImmMoreThan16bitTest,
        StoreWithImmediateIndex) {
   const MemoryAccessImm1 memacc = GetParam();
   TRACED_FOREACH(int32_t, index, memacc.immediates) {
-    StreamBuilder m(this, kMachInt32, kMachPtr, memacc.type);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Pointer(),
+                    memacc.type);
     m.Store(memacc.type, m.Parameter(0), m.Int32Constant(index), m.Parameter(1),
             kNoWriteBarrier);
     m.Return(m.Int32Constant(0));
     Stream s = m.Build();
     ASSERT_EQ(2U, s.size());
     // kMips64Add is expected opcode
     // size more than 16 bits wide
     EXPECT_EQ(kMips64Dadd, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     EXPECT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
   }
 }
 
 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest,
                         InstructionSelectorMemoryAccessImmMoreThan16bitTest,
                         ::testing::ValuesIn(kMemoryAccessImmMoreThan16bit));
 
 
 // ----------------------------------------------------------------------------
 // kMips64Cmp with zero testing.
 // ----------------------------------------------------------------------------
 
 
 TEST_F(InstructionSelectorTest, Word32EqualWithZero) {
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32Equal(m.Parameter(0), m.Int32Constant(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
     EXPECT_EQ(kFlags_set, s[0]->flags_mode());
     EXPECT_EQ(kEqual, s[0]->flags_condition());
   }
   {
-    StreamBuilder m(this, kMachInt32, kMachInt32);
+    StreamBuilder m(this, MachineType::Int32(), MachineType::Int32());
     m.Return(m.Word32Equal(m.Int32Constant(0), m.Parameter(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
     EXPECT_EQ(kFlags_set, s[0]->flags_mode());
     EXPECT_EQ(kEqual, s[0]->flags_condition());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word64EqualWithZero) {
   {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64Equal(m.Parameter(0), m.Int64Constant(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
     EXPECT_EQ(kFlags_set, s[0]->flags_mode());
     EXPECT_EQ(kEqual, s[0]->flags_condition());
   }
   {
-    StreamBuilder m(this, kMachInt64, kMachInt64);
+    StreamBuilder m(this, MachineType::Int64(), MachineType::Int64());
     m.Return(m.Word64Equal(m.Int32Constant(0), m.Parameter(0)));
     Stream s = m.Build();
     ASSERT_EQ(1U, s.size());
     EXPECT_EQ(kMips64Cmp, s[0]->arch_opcode());
     EXPECT_EQ(kMode_None, s[0]->addressing_mode());
     ASSERT_EQ(2U, s[0]->InputCount());
     EXPECT_EQ(1U, s[0]->OutputCount());
     EXPECT_EQ(kFlags_set, s[0]->flags_mode());
     EXPECT_EQ(kEqual, s[0]->flags_condition());
   }
 }
 
 
 TEST_F(InstructionSelectorTest, Word32Clz) {
-  StreamBuilder m(this, kMachUint32, kMachUint32);
+  StreamBuilder m(this, MachineType::Uint32(), MachineType::Uint32());
   Node* const p0 = m.Parameter(0);
   Node* const n = m.Word32Clz(p0);
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64Clz, s[0]->arch_opcode());
   ASSERT_EQ(1U, s[0]->InputCount());
   EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Word64Clz) {
-  StreamBuilder m(this, kMachUint64, kMachUint64);
+  StreamBuilder m(this, MachineType::Uint64(), MachineType::Uint64());
   Node* const p0 = m.Parameter(0);
   Node* const n = m.Word64Clz(p0);
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64Dclz, s[0]->arch_opcode());
   ASSERT_EQ(1U, s[0]->InputCount());
   EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Float32Abs) {
-  StreamBuilder m(this, kMachFloat32, kMachFloat32);
+  StreamBuilder m(this, MachineType::Float32(), MachineType::Float32());
   Node* const p0 = m.Parameter(0);
   Node* const n = m.Float32Abs(p0);
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64AbsS, s[0]->arch_opcode());
   ASSERT_EQ(1U, s[0]->InputCount());
   EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Float64Abs) {
-  StreamBuilder m(this, kMachFloat64, kMachFloat64);
+  StreamBuilder m(this, MachineType::Float64(), MachineType::Float64());
   Node* const p0 = m.Parameter(0);
   Node* const n = m.Float64Abs(p0);
   m.Return(n);
   Stream s = m.Build();
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64AbsD, s[0]->arch_opcode());
   ASSERT_EQ(1U, s[0]->InputCount());
   EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Float32Max) {
-  StreamBuilder m(this, kMachFloat32, kMachFloat32, kMachFloat32);
+  StreamBuilder m(this, MachineType::Float32(), MachineType::Float32(),
+                  MachineType::Float32());
   Node* const p0 = m.Parameter(0);
   Node* const p1 = m.Parameter(1);
   Node* const n = m.Float32Max(p0, p1);
   m.Return(n);
   Stream s = m.Build();
   // Float32Max is `(b < a) ? a : b`.
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64Float32Max, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Float32Min) {
-  StreamBuilder m(this, kMachFloat32, kMachFloat32, kMachFloat32);
+  StreamBuilder m(this, MachineType::Float32(), MachineType::Float32(),
+                  MachineType::Float32());
   Node* const p0 = m.Parameter(0);
   Node* const p1 = m.Parameter(1);
   Node* const n = m.Float32Min(p0, p1);
   m.Return(n);
   Stream s = m.Build();
   // Float32Min is `(a < b) ? a : b`.
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64Float32Min, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Float64Max) {
-  StreamBuilder m(this, kMachFloat64, kMachFloat64, kMachFloat64);
+  StreamBuilder m(this, MachineType::Float64(), MachineType::Float64(),
+                  MachineType::Float64());
   Node* const p0 = m.Parameter(0);
   Node* const p1 = m.Parameter(1);
   Node* const n = m.Float64Max(p0, p1);
   m.Return(n);
   Stream s = m.Build();
   // Float64Max is `(b < a) ? a : b`.
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64Float64Max, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 
 TEST_F(InstructionSelectorTest, Float64Min) {
-  StreamBuilder m(this, kMachFloat64, kMachFloat64, kMachFloat64);
+  StreamBuilder m(this, MachineType::Float64(), MachineType::Float64(),
+                  MachineType::Float64());
   Node* const p0 = m.Parameter(0);
   Node* const p1 = m.Parameter(1);
   Node* const n = m.Float64Min(p0, p1);
   m.Return(n);
   Stream s = m.Build();
   // Float64Min is `(a < b) ? a : b`.
   ASSERT_EQ(1U, s.size());
   EXPECT_EQ(kMips64Float64Min, s[0]->arch_opcode());
   ASSERT_EQ(2U, s[0]->InputCount());
   ASSERT_EQ(1U, s[0]->OutputCount());
   EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8