[turbofan] Make MachineType a pair of enums.

src/compiler/register-allocator.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_REGISTER_ALLOCATOR_H_
 #define V8_REGISTER_ALLOCATOR_H_
 
 #include "src/compiler/instruction.h"
 #include "src/ostreams.h"
 #include "src/register-configuration.h"
@@ skipping 297 matching lines @@
   bool IsTopLevel() const;
 
   LiveRange* next() const { return next_; }
 
   int relative_id() const { return relative_id_; }
 
   bool IsEmpty() const { return first_interval() == nullptr; }
 
   InstructionOperand GetAssignedOperand() const;
 
-  MachineType machine_type() const { return MachineTypeField::decode(bits_); }
+  MachineRepresentation representation() const {
+    return RepresentationField::decode(bits_);
+  }
 
   int assigned_register() const { return AssignedRegisterField::decode(bits_); }
   bool HasRegisterAssigned() const {
     return assigned_register() != kUnassignedRegister;
   }
   void set_assigned_register(int reg);
   void UnsetAssignedRegister();
 
   bool spilled() const { return SpilledField::decode(bits_); }
   void Spill();
@@ skipping 78 matching lines @@
   void set_weight(float weight) { weight_ = weight; }
   LiveRangeGroup* group() const { return group_; }
   void set_group(LiveRangeGroup* group) { group_ = group; }
 
   static const int kInvalidSize = -1;
   static const float kInvalidWeight;
   static const float kMaxWeight;
 
  private:
   friend class TopLevelLiveRange;
-  explicit LiveRange(int relative_id, MachineType machine_type,
+  explicit LiveRange(int relative_id, MachineRepresentation rep,
                      TopLevelLiveRange* top_level);
 
   void AppendAsChild(TopLevelLiveRange* other);
   void UpdateParentForAllChildren(TopLevelLiveRange* new_top_level);
 
   void set_spilled(bool value) { bits_ = SpilledField::update(bits_, value); }
 
   UseInterval* FirstSearchIntervalForPosition(LifetimePosition position) const;
   void AdvanceLastProcessedMarker(UseInterval* to_start_of,
                                   LifetimePosition but_not_past) const;
 
   typedef BitField<bool, 0, 1> SpilledField;
   typedef BitField<int32_t, 6, 6> AssignedRegisterField;
-  typedef BitField<MachineType, 12, 15> MachineTypeField;
+  typedef BitField<MachineRepresentation, 12, 15> RepresentationField;
 
   // Unique among children and splinters of the same virtual register.
   int relative_id_;
   uint32_t bits_;
   UseInterval* last_interval_;
   UseInterval* first_interval_;
   UsePosition* first_pos_;
   TopLevelLiveRange* top_level_;
   LiveRange* next_;
   // This is used as a cache, it doesn't affect correctness.
@@ skipping 32 matching lines @@
 
  private:
   ZoneVector<LiveRange*> ranges_;
   int assigned_register_;
   DISALLOW_COPY_AND_ASSIGN(LiveRangeGroup);
 };
 
 
 class TopLevelLiveRange final : public LiveRange {
  public:
-  explicit TopLevelLiveRange(int vreg, MachineType machine_type);
+  explicit TopLevelLiveRange(int vreg, MachineRepresentation rep);
   int spill_start_index() const { return spill_start_index_; }
 
   bool IsFixed() const { return vreg_ < 0; }
 
   bool is_phi() const { return IsPhiField::decode(bits_); }
   void set_is_phi(bool value) { bits_ = IsPhiField::update(bits_, value); }
 
   bool is_non_loop_phi() const { return IsNonLoopPhiField::decode(bits_); }
   void set_is_non_loop_phi(bool value) {
     bits_ = IsNonLoopPhiField::update(bits_, value);
@@ skipping 271 matching lines @@
   // This zone is for datastructures only needed during register allocation
   // phases.
   Zone* allocation_zone() const { return allocation_zone_; }
   // This zone is for InstructionOperands and moves that live beyond register
   // allocation.
   Zone* code_zone() const { return code()->zone(); }
   Frame* frame() const { return frame_; }
   const char* debug_name() const { return debug_name_; }
   const RegisterConfiguration* config() const { return config_; }
 
-  MachineType MachineTypeFor(int virtual_register);
+  MachineRepresentation RepresentationFor(int virtual_register);
 
   TopLevelLiveRange* GetOrCreateLiveRangeFor(int index);
   // Creates a new live range.
-  TopLevelLiveRange* NewLiveRange(int index, MachineType machine_type);
-  TopLevelLiveRange* NextLiveRange(MachineType machine_type);
+  TopLevelLiveRange* NewLiveRange(int index, MachineRepresentation rep);
+  TopLevelLiveRange* NextLiveRange(MachineRepresentation rep);
 
   SpillRange* AssignSpillRangeToLiveRange(TopLevelLiveRange* range);
   SpillRange* CreateSpillRangeForLiveRange(TopLevelLiveRange* range);
 
   MoveOperands* AddGapMove(int index, Instruction::GapPosition position,
                            const InstructionOperand& from,
                            const InstructionOperand& to);
 
   bool IsReference(TopLevelLiveRange* top_range) const {
     return code()->IsReference(top_range->vreg());
@@ skipping 353 matching lines @@
   RegisterAllocationData* const data_;
 
   DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector);
 };
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_REGISTER_ALLOCATOR_H_