[turbofan] Make MachineType a pair of enums.

src/compiler/register-allocator.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/adapters.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/register-allocator.h"
 #include "src/string-stream.h"
 
 namespace v8 {
@@ skipping 74 matching lines @@
     if (output->IsDoubleRegister() &&
         LocationOperand::cast(output)->GetDoubleRegister().is(reg)) {
       return true;
     }
   }
   return false;
 }
 
 
 // TODO(dcarney): fix frame to allow frame accesses to half size location.
-int GetByteWidth(MachineType machine_type) {
-  DCHECK_EQ(RepresentationOf(machine_type), machine_type);
-  switch (machine_type) {
-    case kRepBit:
-    case kRepWord8:
-    case kRepWord16:
-    case kRepWord32:
-    case kRepTagged:
+int GetByteWidth(MachineRepresentation rep) {
+  switch (rep) {
+    case MachineRepresentation::kBit:
+    case MachineRepresentation::kWord8:
+    case MachineRepresentation::kWord16:
+    case MachineRepresentation::kWord32:
+    case MachineRepresentation::kTagged:
       return kPointerSize;
-    case kRepFloat32:
-    case kRepWord64:
-    case kRepFloat64:
+    case MachineRepresentation::kFloat32:
+    case MachineRepresentation::kWord64:
+    case MachineRepresentation::kFloat64:
       return 8;
     default:
       UNREACHABLE();
       return 0;
   }
 }
 
 }  // namespace
 
 
@@ skipping 127 matching lines @@
     os << 'e';
   }
   return os;
 }
 
 
 const float LiveRange::kInvalidWeight = -1;
 const float LiveRange::kMaxWeight = std::numeric_limits<float>::max();
 
 
-LiveRange::LiveRange(int relative_id, MachineType machine_type,
+LiveRange::LiveRange(int relative_id, MachineRepresentation rep,
                      TopLevelLiveRange* top_level)
     : relative_id_(relative_id),
       bits_(0),
       last_interval_(nullptr),
       first_interval_(nullptr),
       first_pos_(nullptr),
       top_level_(top_level),
       next_(nullptr),
       current_interval_(nullptr),
       last_processed_use_(nullptr),
       current_hint_position_(nullptr),
       splitting_pointer_(nullptr),
       size_(kInvalidSize),
       weight_(kInvalidWeight),
       group_(nullptr) {
-  DCHECK(AllocatedOperand::IsSupportedMachineType(machine_type));
+  DCHECK(AllocatedOperand::IsSupportedRepresentation(rep));
   bits_ = AssignedRegisterField::encode(kUnassignedRegister) |
-          MachineTypeField::encode(machine_type);
+          RepresentationField::encode(rep);
 }
 
 
 void LiveRange::Verify() const {
   // Walk the positions, verifying that each is in an interval.
   auto interval = first_interval_;
   for (auto pos = first_pos_; pos != nullptr; pos = pos->next()) {
     CHECK(Start() <= pos->pos());
     CHECK(pos->pos() <= End());
     CHECK(interval != nullptr);
@@ skipping 19 matching lines @@
 
 void LiveRange::Spill() {
   DCHECK(!spilled());
   DCHECK(!TopLevel()->HasNoSpillType());
   set_spilled(true);
   bits_ = AssignedRegisterField::update(bits_, kUnassignedRegister);
 }
 
 
 RegisterKind LiveRange::kind() const {
-  switch (RepresentationOf(machine_type())) {
-    case kRepFloat32:
-    case kRepFloat64:
-      return DOUBLE_REGISTERS;
-    default:
-      break;
-  }
-  return GENERAL_REGISTERS;
+  return IsFloatingPoint(representation()) ? DOUBLE_REGISTERS
+                                           : GENERAL_REGISTERS;
 }
 
 
 UsePosition* LiveRange::FirstHintPosition(int* register_index) const {
   for (auto pos = first_pos_; pos != nullptr; pos = pos->next()) {
     if (pos->HintRegister(register_index)) return pos;
   }
   return nullptr;
 }
 
@@ skipping 60 matching lines @@
   return use_pos->pos() > pos.NextStart().End();
 }
 
 
 bool LiveRange::IsTopLevel() const { return top_level_ == this; }
 
 
 InstructionOperand LiveRange::GetAssignedOperand() const {
   if (HasRegisterAssigned()) {
     DCHECK(!spilled());
-    return AllocatedOperand(LocationOperand::REGISTER, machine_type(),
+    return AllocatedOperand(LocationOperand::REGISTER, representation(),
                             assigned_register());
   }
   DCHECK(spilled());
   DCHECK(!HasRegisterAssigned());
   if (TopLevel()->HasSpillOperand()) {
     auto op = TopLevel()->GetSpillOperand();
     DCHECK(!op->IsUnallocated());
     return *op;
   }
   return TopLevel()->GetSpillRangeOperand();
@@ skipping 18 matching lines @@
   auto start = current_interval_ == nullptr ? LifetimePosition::Invalid()
                                             : current_interval_->start();
   if (to_start_of->start() > start) {
     current_interval_ = to_start_of;
   }
 }
 
 
 LiveRange* LiveRange::SplitAt(LifetimePosition position, Zone* zone) {
   int new_id = TopLevel()->GetNextChildId();
-  LiveRange* child = new (zone) LiveRange(new_id, machine_type(), TopLevel());
+  LiveRange* child = new (zone) LiveRange(new_id, representation(), TopLevel());
   DetachAt(position, child, zone);
 
   child->top_level_ = TopLevel();
   child->next_ = next_;
   next_ = child;
   if (child->next() == nullptr) {
     TopLevel()->set_last_child(child);
   }
   return child;
 }
@@ skipping 224 matching lines @@
 struct TopLevelLiveRange::SpillMoveInsertionList : ZoneObject {
   SpillMoveInsertionList(int gap_index, InstructionOperand* operand,
                          SpillMoveInsertionList* next)
       : gap_index(gap_index), operand(operand), next(next) {}
   const int gap_index;
   InstructionOperand* const operand;
   SpillMoveInsertionList* const next;
 };
 
 
-TopLevelLiveRange::TopLevelLiveRange(int vreg, MachineType machine_type)
-    : LiveRange(0, machine_type, this),
+TopLevelLiveRange::TopLevelLiveRange(int vreg, MachineRepresentation rep)
+    : LiveRange(0, rep, this),
       vreg_(vreg),
       last_child_id_(0),
       splintered_from_(nullptr),
       spill_operand_(nullptr),
       spill_move_insertion_locations_(nullptr),
       spilled_in_deferred_blocks_(false),
       spill_start_index_(kMaxInt),
       last_child_(this),
       last_pos_(nullptr),
       splinter_(nullptr),
@@ skipping 94 matching lines @@
 void TopLevelLiveRange::SetSpillRange(SpillRange* spill_range) {
   DCHECK(!HasSpillOperand());
   DCHECK(spill_range);
   spill_range_ = spill_range;
 }
 
 
 AllocatedOperand TopLevelLiveRange::GetSpillRangeOperand() const {
   auto spill_range = GetSpillRange();
   int index = spill_range->assigned_slot();
-  return AllocatedOperand(LocationOperand::STACK_SLOT, machine_type(), index);
+  return AllocatedOperand(LocationOperand::STACK_SLOT, representation(), index);
 }
 
 
 void TopLevelLiveRange::Splinter(LifetimePosition start, LifetimePosition end,
                                  Zone* zone) {
   DCHECK(start != Start() || end != End());
   DCHECK(start < end);
 
-  TopLevelLiveRange splinter_temp(-1, machine_type());
+  TopLevelLiveRange splinter_temp(-1, representation());
   UsePosition* last_in_splinter = nullptr;
   // Live ranges defined in deferred blocks stay in deferred blocks, so we
   // don't need to splinter them. That means that start should always be
   // after the beginning of the range.
   DCHECK(start > Start());
 
   if (end >= End()) {
     DCHECK(start > Start());
     DetachAt(start, &splinter_temp, zone);
     next_ = nullptr;
   } else {
     DCHECK(start < End() && Start() < end);
 
     const int kInvalidId = std::numeric_limits<int>::max();
 
     UsePosition* last = DetachAt(start, &splinter_temp, zone);
 
-    LiveRange end_part(kInvalidId, this->machine_type(), nullptr);
+    LiveRange end_part(kInvalidId, this->representation(), nullptr);
     last_in_splinter = splinter_temp.DetachAt(end, &end_part, zone);
 
     next_ = end_part.next_;
     last_interval_->set_next(end_part.first_interval_);
     // The next splinter will happen either at or after the current interval.
     // We can optimize DetachAt by setting current_interval_ accordingly,
     // which will then be picked up by FirstSearchIntervalForPosition.
     current_interval_ = last_interval_;
     last_interval_ = end_part.last_interval_;
 
@@ skipping 243 matching lines @@
     interval = interval->next();
   }
   os << "}";
   return os;
 }
 
 
 SpillRange::SpillRange(TopLevelLiveRange* parent, Zone* zone)
     : live_ranges_(zone),
       assigned_slot_(kUnassignedSlot),
-      byte_width_(GetByteWidth(parent->machine_type())),
+      byte_width_(GetByteWidth(parent->representation())),
       kind_(parent->kind()) {
   // Spill ranges are created for top level, non-splintered ranges. This is so
   // that, when merging decisions are made, we consider the full extent of the
   // virtual register, and avoid clobbering it.
   DCHECK(!parent->IsSplinter());
   UseInterval* result = nullptr;
   UseInterval* node = nullptr;
   // Copy the intervals for all ranges.
   for (LiveRange* range = parent; range != nullptr; range = range->next()) {
     auto src = range->first_interval();
     while (src != nullptr) {
       auto new_node = new (zone) UseInterval(src->start(), src->end());
       if (result == nullptr) {
         result = new_node;
       } else {
         node->set_next(new_node);
       }
       node = new_node;
       src = src->next();
     }
   }
   use_interval_ = result;
   live_ranges().push_back(parent);
   end_position_ = node->end();
   parent->SetSpillRange(this);
 }
 
 
 int SpillRange::ByteWidth() const {
-  return GetByteWidth(live_ranges_[0]->machine_type());
+  return GetByteWidth(live_ranges_[0]->representation());
 }
 
 
 bool SpillRange::IsIntersectingWith(SpillRange* other) const {
   if (this->use_interval_ == nullptr || other->use_interval_ == nullptr ||
       this->End() <= other->use_interval_->start() ||
       other->End() <= this->use_interval_->start()) {
     return false;
   }
   return AreUseIntervalsIntersecting(use_interval_, other->use_interval_);
@@ skipping 118 matching lines @@
 
 MoveOperands* RegisterAllocationData::AddGapMove(
     int index, Instruction::GapPosition position,
     const InstructionOperand& from, const InstructionOperand& to) {
   auto instr = code()->InstructionAt(index);
   auto moves = instr->GetOrCreateParallelMove(position, code_zone());
   return moves->AddMove(from, to);
 }
 
 
-MachineType RegisterAllocationData::MachineTypeFor(int virtual_register) {
+MachineRepresentation RegisterAllocationData::RepresentationFor(
+    int virtual_register) {
   DCHECK_LT(virtual_register, code()->VirtualRegisterCount());
   return code()->GetRepresentation(virtual_register);
 }
 
 
 TopLevelLiveRange* RegisterAllocationData::GetOrCreateLiveRangeFor(int index) {
   if (index >= static_cast<int>(live_ranges().size())) {
     live_ranges().resize(index + 1, nullptr);
   }
   auto result = live_ranges()[index];
   if (result == nullptr) {
-    result = NewLiveRange(index, MachineTypeFor(index));
+    result = NewLiveRange(index, RepresentationFor(index));
     live_ranges()[index] = result;
   }
   return result;
 }
 
 
 TopLevelLiveRange* RegisterAllocationData::NewLiveRange(
-    int index, MachineType machine_type) {
-  return new (allocation_zone()) TopLevelLiveRange(index, machine_type);
+    int index, MachineRepresentation rep) {
+  return new (allocation_zone()) TopLevelLiveRange(index, rep);
 }
 
 
 int RegisterAllocationData::GetNextLiveRangeId() {
   int vreg = virtual_register_count_++;
   if (vreg >= static_cast<int>(live_ranges().size())) {
     live_ranges().resize(vreg + 1, nullptr);
   }
   return vreg;
 }
 
 
 TopLevelLiveRange* RegisterAllocationData::NextLiveRange(
-    MachineType machine_type) {
+    MachineRepresentation rep) {
   int vreg = GetNextLiveRangeId();
-  TopLevelLiveRange* ret = NewLiveRange(vreg, machine_type);
+  TopLevelLiveRange* ret = NewLiveRange(vreg, rep);
   return ret;
 }
 
 
 RegisterAllocationData::PhiMapValue* RegisterAllocationData::InitializePhiMap(
     const InstructionBlock* block, PhiInstruction* phi) {
   auto map_value = new (allocation_zone())
       RegisterAllocationData::PhiMapValue(phi, block, allocation_zone());
   auto res =
       phi_map_.insert(std::make_pair(phi->virtual_register(), map_value));
@@ skipping 186 matching lines @@
 
 ConstraintBuilder::ConstraintBuilder(RegisterAllocationData* data)
     : data_(data) {}
 
 
 InstructionOperand* ConstraintBuilder::AllocateFixed(
     UnallocatedOperand* operand, int pos, bool is_tagged) {
   TRACE("Allocating fixed reg for op %d\n", operand->virtual_register());
   DCHECK(operand->HasFixedPolicy());
   InstructionOperand allocated;
-  MachineType machine_type = InstructionSequence::DefaultRepresentation();
+  MachineRepresentation rep = InstructionSequence::DefaultRepresentation();
   int virtual_register = operand->virtual_register();
   if (virtual_register != InstructionOperand::kInvalidVirtualRegister) {
-    machine_type = data()->MachineTypeFor(virtual_register);
+    rep = data()->RepresentationFor(virtual_register);
   }
   if (operand->HasFixedSlotPolicy()) {
-    allocated = AllocatedOperand(AllocatedOperand::STACK_SLOT, machine_type,
+    allocated = AllocatedOperand(AllocatedOperand::STACK_SLOT, rep,
                                  operand->fixed_slot_index());
   } else if (operand->HasFixedRegisterPolicy()) {
-    DCHECK(!IsFloatingPoint(machine_type));
-    allocated = AllocatedOperand(AllocatedOperand::REGISTER, machine_type,
+    DCHECK(!IsFloatingPoint(rep));
+    allocated = AllocatedOperand(AllocatedOperand::REGISTER, rep,
                                  operand->fixed_register_index());
   } else if (operand->HasFixedDoubleRegisterPolicy()) {
-    DCHECK(IsFloatingPoint(machine_type));
+    DCHECK(IsFloatingPoint(rep));
     DCHECK_NE(InstructionOperand::kInvalidVirtualRegister, virtual_register);
-    allocated = AllocatedOperand(AllocatedOperand::REGISTER, machine_type,
+    allocated = AllocatedOperand(AllocatedOperand::REGISTER, rep,
                                  operand->fixed_register_index());
   } else {
     UNREACHABLE();
   }
   InstructionOperand::ReplaceWith(operand, &allocated);
   if (is_tagged) {
     TRACE("Fixed reg is tagged at %d\n", pos);
     auto instr = code()->InstructionAt(pos);
     if (instr->HasReferenceMap()) {
       instr->reference_map()->RecordReference(*AllocatedOperand::cast(operand));
@@ skipping 91 matching lines @@
         data()->GetOrCreateLiveRangeFor(first_output->virtual_register());
     bool assigned = false;
     if (first_output->HasFixedPolicy()) {
       int output_vreg = first_output->virtual_register();
       UnallocatedOperand output_copy(UnallocatedOperand::ANY, output_vreg);
       bool is_tagged = code()->IsReference(output_vreg);
       if (first_output->HasSecondaryStorage()) {
         range->MarkHasPreassignedSlot();
         InstructionOperand* spill_op = AllocatedOperand::New(
             data()->code_zone(), LocationOperand::LocationKind::STACK_SLOT,
-            range->machine_type(), first_output->GetSecondaryStorage());
+            range->representation(), first_output->GetSecondaryStorage());
         range->RecordSpillLocation(allocation_zone(), instr_index + 1,
                                    first_output);
         range->SetSpillOperand(spill_op);
         range->SetSpillStartIndex(instr_index + 1);
         assigned = true;
       }
       AllocateFixed(first_output, instr_index, is_tagged);
 
       // This value is produced on the stack, we never need to spill it.
       if (first_output->IsStackSlot()) {
@@ skipping 178 matching lines @@
     data()->fixed_live_ranges()[index] = result;
   }
   return result;
 }
 
 
 TopLevelLiveRange* LiveRangeBuilder::FixedDoubleLiveRangeFor(int index) {
   DCHECK(index < config()->num_double_registers());
   auto result = data()->fixed_double_live_ranges()[index];
   if (result == nullptr) {
-    result = data()->NewLiveRange(FixedDoubleLiveRangeID(index), kRepFloat64);
+    result = data()->NewLiveRange(FixedDoubleLiveRangeID(index),
+                                  MachineRepresentation::kFloat64);
     DCHECK(result->IsFixed());
     result->set_assigned_register(index);
     data()->MarkAllocated(DOUBLE_REGISTERS, index);
     data()->fixed_double_live_ranges()[index] = result;
   }
   return result;
 }
 
 
 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) {
@@ skipping 1252 matching lines @@
     InstructionOperand spill_operand;
     if (((range->HasSpillOperand() &&
           !range->GetSpillOperand()->IsConstant()) ||
          range->HasSpillRange())) {
       if (range->HasSpillOperand()) {
         spill_operand = *range->GetSpillOperand();
       } else {
         spill_operand = range->GetSpillRangeOperand();
       }
       DCHECK(spill_operand.IsStackSlot());
-      DCHECK_EQ(kRepTagged,
-                AllocatedOperand::cast(spill_operand).machine_type());
+      DCHECK_EQ(MachineRepresentation::kTagged,
+                AllocatedOperand::cast(spill_operand).representation());
     }
 
     // Step through the safe points to see whether they are in the range.
     for (auto it = first_it; it != reference_maps->end(); ++it) {
       auto map = *it;
       int safe_point = map->instruction_position();
 
       // The safe points are sorted so we can stop searching here.
       if (safe_point - 1 > end) break;
 
@@ skipping 20 matching lines @@
       }
 
       if (!cur->spilled()) {
         TRACE(
             "Pointer in register for range %d:%d (start at %d) "
             "at safe point %d\n",
             range->vreg(), cur->relative_id(), cur->Start().value(),
             safe_point);
         auto operand = cur->GetAssignedOperand();
         DCHECK(!operand.IsStackSlot());
-        DCHECK_EQ(kRepTagged, AllocatedOperand::cast(operand).machine_type());
+        DCHECK_EQ(MachineRepresentation::kTagged,
+                  AllocatedOperand::cast(operand).representation());
         map->RecordReference(AllocatedOperand::cast(operand));
       }
     }
   }
 }
 
 
 namespace {
 
 class LiveRangeBound {
@@ skipping 289 matching lines @@
     auto eliminate = moves->PrepareInsertAfter(move);
     to_insert.push_back(move);
     if (eliminate != nullptr) to_eliminate.push_back(eliminate);
   }
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8