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Side by Side Diff: src/IceInstARM32.cpp

Issue 1511653002: Fix problems with sandboxing and the ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Clean up small issues raised in last patch. Created 5 years ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1271 ++IntegerCount; 1271 ++IntegerCount;
1272 } 1272 }
1273 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 1273 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1274 switch (IntegerCount) { 1274 switch (IntegerCount) {
1275 case 0: 1275 case 0:
1276 return; 1276 return;
1277 case 1: 1277 case 1:
1278 // Note: Can only apply pop register if single register is not sp. 1278 // Note: Can only apply pop register if single register is not sp.
1279 assert((RegARM32::Encoded_Reg_sp != LastDest->getRegNum()) && 1279 assert((RegARM32::Encoded_Reg_sp != LastDest->getRegNum()) &&
1280 "Effects of pop register SP is undefined!"); 1280 "Effects of pop register SP is undefined!");
1281 // TODO(kschimpf) ARM sandbox does not allow the single register form of
1282 // pop, and the popList form expects multiple registers. Convert this
1283 // assert to a conditional check once it has been shown that popList
1284 // works.
1285 assert(!Func->getContext()->getFlags().getUseSandboxing() &&
1286 "pop register not in ARM sandbox!");
1287 Asm->pop(LastDest, CondARM32::AL); 1281 Asm->pop(LastDest, CondARM32::AL);
1288 break; 1282 break;
1289 default: 1283 default:
1290 Asm->popList(GPRegisters, CondARM32::AL); 1284 Asm->popList(GPRegisters, CondARM32::AL);
1291 break; 1285 break;
1292 } 1286 }
1293 if (Asm->needsTextFixup()) 1287 if (Asm->needsTextFixup())
1294 emitUsingTextFixup(Func); 1288 emitUsingTextFixup(Func);
1295 } 1289 }
1296 1290
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1377 ++IntegerCount; 1371 ++IntegerCount;
1378 } 1372 }
1379 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 1373 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1380 switch (IntegerCount) { 1374 switch (IntegerCount) {
1381 case 0: 1375 case 0:
1382 return; 1376 return;
1383 case 1: { 1377 case 1: {
1384 // Note: Can only apply push register if single register is not sp. 1378 // Note: Can only apply push register if single register is not sp.
1385 assert((RegARM32::Encoded_Reg_sp != LastSrc->getRegNum()) && 1379 assert((RegARM32::Encoded_Reg_sp != LastSrc->getRegNum()) &&
1386 "Effects of push register SP is undefined!"); 1380 "Effects of push register SP is undefined!");
1387 // TODO(kschimpf) ARM sandbox does not allow the single register form of
1388 // push, and the pushList form expects multiple registers. Convert this
1389 // assert to a conditional check once it has been shown that pushList
1390 // works.
1391 assert(!Func->getContext()->getFlags().getUseSandboxing() &&
1392 "push register not in ARM sandbox!");
1393 Asm->push(LastSrc, CondARM32::AL); 1381 Asm->push(LastSrc, CondARM32::AL);
1394 break; 1382 break;
1395 } 1383 }
1396 default: 1384 default:
1397 // TODO(kschimpf) Implement pushList in assembler. 1385 // TODO(kschimpf) Implement pushList in assembler.
1398 Asm->pushList(GPRegisters, CondARM32::AL); 1386 Asm->pushList(GPRegisters, CondARM32::AL);
1399 break; 1387 break;
1400 } 1388 }
1401 if (Asm->needsTextFixup()) 1389 if (Asm->needsTextFixup())
1402 emitUsingTextFixup(Func); 1390 emitUsingTextFixup(Func);
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1781 } 1769 }
1782 Str << "] AddrMode==" << getAddrMode(); 1770 Str << "] AddrMode==" << getAddrMode();
1783 } 1771 }
1784 1772
1785 void OperandARM32ShAmtImm::emit(const Cfg *Func) const { ShAmt->emit(Func); } 1773 void OperandARM32ShAmtImm::emit(const Cfg *Func) const { ShAmt->emit(Func); }
1786 1774
1787 void OperandARM32ShAmtImm::dump(const Cfg *, Ostream &Str) const { 1775 void OperandARM32ShAmtImm::dump(const Cfg *, Ostream &Str) const {
1788 ShAmt->dump(Str); 1776 ShAmt->dump(Str);
1789 } 1777 }
1790 1778
1779 OperandARM32FlexImm *OperandARM32FlexImm::create(Cfg *Func, Type Ty,
1780 uint32_t Imm,
1781 uint32_t RotateAmt) {
1782 // The assembler wants the smallest rotation. Rotate if needed. Note: Imm is
1783 // an 8-bit value.
1784 assert(Utils::IsUint(8, Imm) &&
1785 "Flex immediates can only be defined on 8-bit immediates");
1786 while ((Imm & 0x03) == 0 && RotateAmt > 0) {
1787 --RotateAmt;
1788 Imm = Imm >> 2;
1789 }
1790 return new (Func->allocate<OperandARM32FlexImm>())
1791 OperandARM32FlexImm(Func, Ty, Imm, RotateAmt);
1792 }
1793
1791 void OperandARM32FlexImm::emit(const Cfg *Func) const { 1794 void OperandARM32FlexImm::emit(const Cfg *Func) const {
1792 if (!BuildDefs::dump()) 1795 if (!BuildDefs::dump())
1793 return; 1796 return;
1794 Ostream &Str = Func->getContext()->getStrEmit(); 1797 Ostream &Str = Func->getContext()->getStrEmit();
1795 uint32_t Imm = getImm(); 1798 uint32_t Imm = getImm();
1796 uint32_t RotateAmt = getRotateAmt(); 1799 uint32_t RotateAmt = getRotateAmt();
1797 Str << "#" << Utils::rotateRight32(Imm, 2 * RotateAmt); 1800 Str << "#" << Utils::rotateRight32(Imm, 2 * RotateAmt);
1798 } 1801 }
1799 1802
1800 void OperandARM32FlexImm::dump(const Cfg * /* Func */, Ostream &Str) const { 1803 void OperandARM32FlexImm::dump(const Cfg * /* Func */, Ostream &Str) const {
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1933 template class InstARM32UnaryopFP<InstARM32::Vsqrt>; 1936 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
1934 1937
1935 template class InstARM32FourAddrGPR<InstARM32::Mla>; 1938 template class InstARM32FourAddrGPR<InstARM32::Mla>;
1936 template class InstARM32FourAddrGPR<InstARM32::Mls>; 1939 template class InstARM32FourAddrGPR<InstARM32::Mls>;
1937 1940
1938 template class InstARM32CmpLike<InstARM32::Cmn>; 1941 template class InstARM32CmpLike<InstARM32::Cmn>;
1939 template class InstARM32CmpLike<InstARM32::Cmp>; 1942 template class InstARM32CmpLike<InstARM32::Cmp>;
1940 template class InstARM32CmpLike<InstARM32::Tst>; 1943 template class InstARM32CmpLike<InstARM32::Tst>;
1941 1944
1942 } // end of namespace Ice 1945 } // end of namespace Ice
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