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Side by Side Diff: src/IceInstARM32.cpp

Issue 1511653002: Fix problems with sandboxing and the ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Lift pass information into linkTo() and nearLinkTo(). Created 5 years ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1264 ++IntegerCount; 1264 ++IntegerCount;
1265 } 1265 }
1266 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 1266 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1267 switch (IntegerCount) { 1267 switch (IntegerCount) {
1268 case 0: 1268 case 0:
1269 return; 1269 return;
1270 case 1: 1270 case 1:
1271 // Note: Can only apply pop register if single register is not sp. 1271 // Note: Can only apply pop register if single register is not sp.
1272 assert((RegARM32::Encoded_Reg_sp != LastDest->getRegNum()) && 1272 assert((RegARM32::Encoded_Reg_sp != LastDest->getRegNum()) &&
1273 "Effects of pop register SP is undefined!"); 1273 "Effects of pop register SP is undefined!");
1274 // TODO(kschimpf) ARM sandbox does not allow the single register form of
1275 // pop, and the popList form expects multiple registers. Convert this
1276 // assert to a conditional check once it has been shown that popList
1277 // works.
1278 assert(!Func->getContext()->getFlags().getUseSandboxing() &&
1279 "pop register not in ARM sandbox!");
1280 Asm->pop(LastDest, CondARM32::AL); 1274 Asm->pop(LastDest, CondARM32::AL);
1281 break; 1275 break;
1282 default: 1276 default:
1283 Asm->popList(GPRegisters, CondARM32::AL); 1277 Asm->popList(GPRegisters, CondARM32::AL);
1284 break; 1278 break;
1285 } 1279 }
1286 if (Asm->needsTextFixup()) 1280 if (Asm->needsTextFixup())
1287 emitUsingTextFixup(Func); 1281 emitUsingTextFixup(Func);
1288 } 1282 }
1289 1283
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1370 ++IntegerCount; 1364 ++IntegerCount;
1371 } 1365 }
1372 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 1366 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1373 switch (IntegerCount) { 1367 switch (IntegerCount) {
1374 case 0: 1368 case 0:
1375 return; 1369 return;
1376 case 1: { 1370 case 1: {
1377 // Note: Can only apply push register if single register is not sp. 1371 // Note: Can only apply push register if single register is not sp.
1378 assert((RegARM32::Encoded_Reg_sp != LastSrc->getRegNum()) && 1372 assert((RegARM32::Encoded_Reg_sp != LastSrc->getRegNum()) &&
1379 "Effects of push register SP is undefined!"); 1373 "Effects of push register SP is undefined!");
1380 // TODO(kschimpf) ARM sandbox does not allow the single register form of
1381 // push, and the pushList form expects multiple registers. Convert this
1382 // assert to a conditional check once it has been shown that pushList
1383 // works.
1384 assert(!Func->getContext()->getFlags().getUseSandboxing() &&
1385 "push register not in ARM sandbox!");
1386 Asm->push(LastSrc, CondARM32::AL); 1374 Asm->push(LastSrc, CondARM32::AL);
1387 break; 1375 break;
1388 } 1376 }
1389 default: 1377 default:
1390 // TODO(kschimpf) Implement pushList in assembler. 1378 // TODO(kschimpf) Implement pushList in assembler.
1391 Asm->pushList(GPRegisters, CondARM32::AL); 1379 Asm->pushList(GPRegisters, CondARM32::AL);
1392 break; 1380 break;
1393 } 1381 }
1394 if (Asm->needsTextFixup()) 1382 if (Asm->needsTextFixup())
1395 emitUsingTextFixup(Func); 1383 emitUsingTextFixup(Func);
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1774 } 1762 }
1775 Str << "] AddrMode==" << getAddrMode(); 1763 Str << "] AddrMode==" << getAddrMode();
1776 } 1764 }
1777 1765
1778 void OperandARM32ShAmtImm::emit(const Cfg *Func) const { ShAmt->emit(Func); } 1766 void OperandARM32ShAmtImm::emit(const Cfg *Func) const { ShAmt->emit(Func); }
1779 1767
1780 void OperandARM32ShAmtImm::dump(const Cfg *, Ostream &Str) const { 1768 void OperandARM32ShAmtImm::dump(const Cfg *, Ostream &Str) const {
1781 ShAmt->dump(Str); 1769 ShAmt->dump(Str);
1782 } 1770 }
1783 1771
1772 OperandARM32FlexImm *OperandARM32FlexImm::create(Cfg *Func, Type Ty,
1773 uint32_t Imm,
1774 uint32_t RotateAmt) {
1775 // The assembler wants the smallest rotation. Rotate if needed. Note: Imm is
1776 // an 8-bit value.
1777 assert(Utils::IsUint(8, Imm) &&
1778 "Flex immediates can only be defined on 8-bit immediates");
1779 while ((Imm & 0x03) == 0 && RotateAmt > 0) {
1780 --RotateAmt;
1781 Imm = Imm >> 2;
1782 }
1783 return new (Func->allocate<OperandARM32FlexImm>())
1784 OperandARM32FlexImm(Func, Ty, Imm, RotateAmt);
1785 }
1786
1784 void OperandARM32FlexImm::emit(const Cfg *Func) const { 1787 void OperandARM32FlexImm::emit(const Cfg *Func) const {
1785 if (!BuildDefs::dump()) 1788 if (!BuildDefs::dump())
1786 return; 1789 return;
1787 Ostream &Str = Func->getContext()->getStrEmit(); 1790 Ostream &Str = Func->getContext()->getStrEmit();
1788 uint32_t Imm = getImm(); 1791 uint32_t Imm = getImm();
1789 uint32_t RotateAmt = getRotateAmt(); 1792 uint32_t RotateAmt = getRotateAmt();
1790 Str << "#" << Utils::rotateRight32(Imm, 2 * RotateAmt); 1793 Str << "#" << Utils::rotateRight32(Imm, 2 * RotateAmt);
1791 } 1794 }
1792 1795
1793 void OperandARM32FlexImm::dump(const Cfg * /* Func */, Ostream &Str) const { 1796 void OperandARM32FlexImm::dump(const Cfg * /* Func */, Ostream &Str) const {
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1926 template class InstARM32UnaryopFP<InstARM32::Vsqrt>; 1929 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
1927 1930
1928 template class InstARM32FourAddrGPR<InstARM32::Mla>; 1931 template class InstARM32FourAddrGPR<InstARM32::Mla>;
1929 template class InstARM32FourAddrGPR<InstARM32::Mls>; 1932 template class InstARM32FourAddrGPR<InstARM32::Mls>;
1930 1933
1931 template class InstARM32CmpLike<InstARM32::Cmn>; 1934 template class InstARM32CmpLike<InstARM32::Cmn>;
1932 template class InstARM32CmpLike<InstARM32::Cmp>; 1935 template class InstARM32CmpLike<InstARM32::Cmp>;
1933 template class InstARM32CmpLike<InstARM32::Tst>; 1936 template class InstARM32CmpLike<InstARM32::Tst>;
1934 1937
1935 } // end of namespace Ice 1938 } // end of namespace Ice
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