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Issue 1511223002: MIPS: [turbofan] Fix Div operations by zero on r6. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
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629 break; 629 break;
630 case kMipsMulHigh: 630 case kMipsMulHigh:
631 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 631 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
632 break; 632 break;
633 case kMipsMulHighU: 633 case kMipsMulHighU:
634 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 634 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
635 break; 635 break;
636 case kMipsDiv: 636 case kMipsDiv:
637 __ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 637 __ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
638 if (IsMipsArchVariant(kMips32r6)) { 638 if (IsMipsArchVariant(kMips32r6)) {
639 __ seleqz(i.OutputRegister(), i.InputRegister(0), i.InputRegister(0)); 639 __ selnez(i.OutputRegister(), i.InputRegister(1), i.InputRegister(0));
640 } else { 640 } else {
641 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); 641 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
642 } 642 }
643 break; 643 break;
644 case kMipsDivU: 644 case kMipsDivU:
645 __ Divu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 645 __ Divu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
646 if (IsMipsArchVariant(kMips32r6)) { 646 if (IsMipsArchVariant(kMips32r6)) {
647 __ seleqz(i.OutputRegister(), i.InputRegister(0), i.InputRegister(0)); 647 __ selnez(i.OutputRegister(), i.InputRegister(1), i.InputRegister(0));
648 } else { 648 } else {
649 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); 649 __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1));
650 } 650 }
651 break; 651 break;
652 case kMipsMod: 652 case kMipsMod:
653 __ Mod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 653 __ Mod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
654 break; 654 break;
655 case kMipsModU: 655 case kMipsModU:
656 __ Modu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 656 __ Modu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
657 break; 657 break;
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1702 padding_size -= v8::internal::Assembler::kInstrSize; 1702 padding_size -= v8::internal::Assembler::kInstrSize;
1703 } 1703 }
1704 } 1704 }
1705 } 1705 }
1706 1706
1707 #undef __ 1707 #undef __
1708 1708
1709 } // namespace compiler 1709 } // namespace compiler
1710 } // namespace internal 1710 } // namespace internal
1711 } // namespace v8 1711 } // namespace v8
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