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Unified Diff: src/ia32/code-stubs-ia32.cc

Issue 15102006: BinaryOpStub::GenerateSmiStub() on 32bit would erroneously patch the IC in case of a gc requirement… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Removed x64 change Created 7 years, 7 months ago
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Index: src/ia32/code-stubs-ia32.cc
diff --git a/src/ia32/code-stubs-ia32.cc b/src/ia32/code-stubs-ia32.cc
index 2897234977d0ace3dd3259635392277e7c9d02fb..29569fa2492d50a6f3cb443cff7ec42fed4f572c 100644
--- a/src/ia32/code-stubs-ia32.cc
+++ b/src/ia32/code-stubs-ia32.cc
@@ -1633,7 +1633,9 @@ void BinaryOpStub::GenerateSmiStub(MacroAssembler* masm) {
BinaryOpStub_GenerateSmiCode(
masm, &call_runtime, ALLOW_HEAPNUMBER_RESULTS, op_);
}
- __ bind(&call_runtime);
+
+ // Code falls through if the result is not returned as either a smi or heap
+ // number.
switch (op_) {
case Token::ADD:
case Token::SUB:
@@ -1653,6 +1655,27 @@ void BinaryOpStub::GenerateSmiStub(MacroAssembler* masm) {
default:
UNREACHABLE();
}
+
+ __ bind(&call_runtime);
+ switch (op_) {
+ case Token::ADD:
+ case Token::SUB:
+ case Token::MUL:
+ case Token::DIV:
+ GenerateRegisterArgsPush(masm);
+ break;
+ case Token::MOD:
+ case Token::BIT_OR:
+ case Token::BIT_AND:
+ case Token::BIT_XOR:
+ case Token::SAR:
+ case Token::SHL:
+ case Token::SHR:
+ break;
+ default:
+ UNREACHABLE();
+ }
+ GenerateCallRuntime(masm);
}
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