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1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
2 // | 2 // |
3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
6 // | 6 // |
7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
8 // | 8 // |
9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
10 // | 10 // |
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205 void bl(const ConstantRelocatable *Target); | 205 void bl(const ConstantRelocatable *Target); |
206 | 206 |
207 void blx(const Operand *Target); | 207 void blx(const Operand *Target); |
208 | 208 |
209 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); | 209 void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL); |
210 | 210 |
211 void cmn(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); | 211 void cmn(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); |
212 | 212 |
213 void cmp(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); | 213 void cmp(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); |
214 | 214 |
215 void dmb(IValueT Option); // Option 4 bit value. | |
Jim Stichnoth
2015/12/09 01:42:03
What is option 4?
(Maybe you mean "Option is a 4-
Karl
2015/12/09 15:35:18
Done.
| |
216 | |
215 void eor(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 217 void eor(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
216 bool SetFlags, CondARM32::Cond Cond); | 218 bool SetFlags, CondARM32::Cond Cond); |
217 | 219 |
218 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond, | 220 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond, |
219 const TargetInfo &TInfo); | 221 const TargetInfo &TInfo); |
220 | 222 |
221 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond, | 223 void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond, |
222 const TargetLowering *Lowering) { | 224 const TargetLowering *Lowering) { |
223 const TargetInfo TInfo(Lowering); | 225 const TargetInfo TInfo(Lowering); |
224 ldr(OpRt, OpAddress, Cond, TInfo); | 226 ldr(OpRt, OpAddress, Cond, TInfo); |
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419 // where cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and | 421 // where cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and |
420 // iiiiiiiiiiiiiiii=Imm16. | 422 // iiiiiiiiiiiiiiii=Imm16. |
421 void emitMovwt(CondARM32::Cond Cond, bool IsMovw, const Operand *OpRd, | 423 void emitMovwt(CondARM32::Cond Cond, bool IsMovw, const Operand *OpRd, |
422 const Operand *OpSrc, const char *MovName); | 424 const Operand *OpSrc, const char *MovName); |
423 }; | 425 }; |
424 | 426 |
425 } // end of namespace ARM32 | 427 } // end of namespace ARM32 |
426 } // end of namespace Ice | 428 } // end of namespace Ice |
427 | 429 |
428 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 430 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
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