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Side by Side Diff: src/compiler/arm64/code-generator-arm64.cc

Issue 1507703002: [turbofan] Change TruncateFloat64ToUint64 to TryTruncateFloatToUint64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Added mips64 implementation, fixed nits. Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm64/frames-arm64.h" 7 #include "src/arm64/frames-arm64.h"
8 #include "src/arm64/macro-assembler-arm64.h" 8 #include "src/arm64/macro-assembler-arm64.h"
9 #include "src/ast/scopes.h" 9 #include "src/ast/scopes.h"
10 #include "src/compiler/code-generator-impl.h" 10 #include "src/compiler/code-generator-impl.h"
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1047 __ Ccmp(i.OutputRegister(0), -1, VFlag, vc); 1047 __ Ccmp(i.OutputRegister(0), -1, VFlag, vc);
1048 __ Fccmp(i.InputDoubleRegister(0), i.InputDoubleRegister(0), VFlag, vc); 1048 __ Fccmp(i.InputDoubleRegister(0), i.InputDoubleRegister(0), VFlag, vc);
1049 __ Cset(i.OutputRegister(1), vc); 1049 __ Cset(i.OutputRegister(1), vc);
1050 } 1050 }
1051 break; 1051 break;
1052 case kArm64Float32ToUint64: 1052 case kArm64Float32ToUint64:
1053 __ Fcvtzu(i.OutputRegister64(), i.InputFloat32Register(0)); 1053 __ Fcvtzu(i.OutputRegister64(), i.InputFloat32Register(0));
1054 break; 1054 break;
1055 case kArm64Float64ToUint64: 1055 case kArm64Float64ToUint64:
1056 __ Fcvtzu(i.OutputRegister64(), i.InputDoubleRegister(0)); 1056 __ Fcvtzu(i.OutputRegister64(), i.InputDoubleRegister(0));
1057 if (i.OutputCount() > 1) {
1058 __ Fcmp(i.InputDoubleRegister(0), 0.0);
1059 __ Ccmp(i.OutputRegister(0), -1, ZFlag, ge);
1060 __ Cset(i.OutputRegister(1), ne);
1061 }
1057 break; 1062 break;
1058 case kArm64Int32ToFloat64: 1063 case kArm64Int32ToFloat64:
1059 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0)); 1064 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0));
1060 break; 1065 break;
1061 case kArm64Int64ToFloat32: 1066 case kArm64Int64ToFloat32:
1062 __ Scvtf(i.OutputDoubleRegister().S(), i.InputRegister64(0)); 1067 __ Scvtf(i.OutputDoubleRegister().S(), i.InputRegister64(0));
1063 break; 1068 break;
1064 case kArm64Int64ToFloat64: 1069 case kArm64Int64ToFloat64:
1065 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister64(0)); 1070 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister64(0));
1066 break; 1071 break;
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1603 padding_size -= kInstructionSize; 1608 padding_size -= kInstructionSize;
1604 } 1609 }
1605 } 1610 }
1606 } 1611 }
1607 1612
1608 #undef __ 1613 #undef __
1609 1614
1610 } // namespace compiler 1615 } // namespace compiler
1611 } // namespace internal 1616 } // namespace internal
1612 } // namespace v8 1617 } // namespace v8
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