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1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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72 using X86OperandMem = typename Traits::X86OperandMem; | 72 using X86OperandMem = typename Traits::X86OperandMem; |
73 using SegmentRegisters = typename Traits::X86OperandMem::SegmentRegisters; | 73 using SegmentRegisters = typename Traits::X86OperandMem::SegmentRegisters; |
74 using SpillVariable = typename Traits::SpillVariable; | 74 using SpillVariable = typename Traits::SpillVariable; |
75 | 75 |
76 using InstX86Br = typename Traits::Insts::Br; | 76 using InstX86Br = typename Traits::Insts::Br; |
77 using InstX86FakeRMW = typename Traits::Insts::FakeRMW; | 77 using InstX86FakeRMW = typename Traits::Insts::FakeRMW; |
78 using InstX86Label = typename Traits::Insts::Label; | 78 using InstX86Label = typename Traits::Insts::Label; |
79 | 79 |
80 ~TargetX86Base() override = default; | 80 ~TargetX86Base() override = default; |
81 | 81 |
82 static void staticInit(); | 82 static void staticInit(const ClFlags &Flags); |
83 static TargetX86Base *create(Cfg *Func) { return new TargetX86Base(Func); } | 83 static TargetX86Base *create(Cfg *Func) { return new TargetX86Base(Func); } |
84 | 84 |
| 85 static FixupKind getPcRelFixup() { return PcRelFixup; } |
| 86 static FixupKind getAbsFixup() { return AbsFixup; } |
| 87 |
85 void translateOm1() override; | 88 void translateOm1() override; |
86 void translateO2() override; | 89 void translateO2() override; |
87 void doLoadOpt(); | 90 void doLoadOpt(); |
88 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; | 91 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; |
89 | 92 |
90 SizeT getNumRegisters() const override { | 93 SizeT getNumRegisters() const override { |
91 return Traits::RegisterSet::Reg_NUM; | 94 return Traits::RegisterSet::Reg_NUM; |
92 } | 95 } |
93 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; | 96 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; |
94 IceString getRegName(SizeT RegNum, Type Ty) const override; | 97 IceString getRegName(SizeT RegNum, Type Ty) const override; |
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139 } | 142 } |
140 | 143 |
141 bool shouldSplitToVariable64On32(Type Ty) const override { | 144 bool shouldSplitToVariable64On32(Type Ty) const override { |
142 return Traits::Is64Bit ? false : Ty == IceType_i64; | 145 return Traits::Is64Bit ? false : Ty == IceType_i64; |
143 } | 146 } |
144 | 147 |
145 SizeT getMinJumpTableSize() const override { return 4; } | 148 SizeT getMinJumpTableSize() const override { return 4; } |
146 | 149 |
147 void emitVariable(const Variable *Var) const override; | 150 void emitVariable(const Variable *Var) const override; |
148 | 151 |
149 const char *getConstantPrefix() const final { return "$"; } | |
150 void emit(const ConstantUndef *C) const final; | |
151 void emit(const ConstantInteger32 *C) const final; | 152 void emit(const ConstantInteger32 *C) const final; |
152 void emit(const ConstantInteger64 *C) const final; | 153 void emit(const ConstantInteger64 *C) const final; |
153 void emit(const ConstantFloat *C) const final; | 154 void emit(const ConstantFloat *C) const final; |
154 void emit(const ConstantDouble *C) const final; | 155 void emit(const ConstantDouble *C) const final; |
| 156 void emit(const ConstantUndef *C) const final; |
| 157 void emit(const ConstantRelocatable *C) const final; |
155 | 158 |
156 void initNodeForLowering(CfgNode *Node) override; | 159 void initNodeForLowering(CfgNode *Node) override; |
157 | 160 |
158 template <typename T = Traits> | 161 template <typename T = Traits> |
159 typename std::enable_if<!T::Is64Bit, Operand>::type * | 162 typename std::enable_if<!T::Is64Bit, Operand>::type * |
160 loOperand(Operand *Operand); | 163 loOperand(Operand *Operand); |
161 template <typename T = Traits> | 164 template <typename T = Traits> |
162 typename std::enable_if<T::Is64Bit, Operand>::type *loOperand(Operand *) { | 165 typename std::enable_if<T::Is64Bit, Operand>::type *loOperand(Operand *) { |
163 llvm::report_fatal_error( | 166 llvm::report_fatal_error( |
164 "Hey, yo! This is x86-64. Watcha doin'? (loOperand)"); | 167 "Hey, yo! This is x86-64. Watcha doin'? (loOperand)"); |
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277 /// that the Operand kind is one of those indicated by the LegalMask (a | 280 /// that the Operand kind is one of those indicated by the LegalMask (a |
278 /// bitmask of allowed kinds). If the input Operand is known to already meet | 281 /// bitmask of allowed kinds). If the input Operand is known to already meet |
279 /// the constraints, it may be simply returned as the result, without creating | 282 /// the constraints, it may be simply returned as the result, without creating |
280 /// any new instructions or operands. | 283 /// any new instructions or operands. |
281 enum OperandLegalization { | 284 enum OperandLegalization { |
282 Legal_None = 0, | 285 Legal_None = 0, |
283 Legal_Reg = 1 << 0, // physical register, not stack location | 286 Legal_Reg = 1 << 0, // physical register, not stack location |
284 Legal_Imm = 1 << 1, | 287 Legal_Imm = 1 << 1, |
285 Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12] | 288 Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12] |
286 Legal_Rematerializable = 1 << 3, | 289 Legal_Rematerializable = 1 << 3, |
287 Legal_All = ~Legal_Rematerializable | 290 Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add GotVar |
| 291 Legal_Default = ~(Legal_Rematerializable | Legal_AddrAbs) |
| 292 // TODO(stichnot): Figure out whether this default works for x86-64. |
288 }; | 293 }; |
289 using LegalMask = uint32_t; | 294 using LegalMask = uint32_t; |
290 Operand *legalize(Operand *From, LegalMask Allowed = Legal_All, | 295 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default, |
291 int32_t RegNum = Variable::NoRegister); | 296 int32_t RegNum = Variable::NoRegister); |
292 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister); | 297 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister); |
293 /// Legalize the first source operand for use in the cmp instruction. | 298 /// Legalize the first source operand for use in the cmp instruction. |
294 Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1); | 299 Operand *legalizeSrc0ForCmp(Operand *Src0, Operand *Src1); |
295 /// Turn a pointer operand into a memory operand that can be used by a real | 300 /// Turn a pointer operand into a memory operand that can be used by a real |
296 /// load/store operation. Legalizes the operand as well. This is a nop if the | 301 /// load/store operation. Legalizes the operand as well. This is a nop if the |
297 /// operand is already a legal memory operand. | 302 /// operand is already a legal memory operand. |
298 X86OperandMem *formMemoryOperand(Operand *Ptr, Type Ty, | 303 X86OperandMem *formMemoryOperand(Operand *Ptr, Type Ty, |
299 bool DoLegalize = true); | 304 bool DoLegalize = true); |
300 | 305 |
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737 size_t FixedAllocaSizeBytes = 0; | 742 size_t FixedAllocaSizeBytes = 0; |
738 size_t FixedAllocaAlignBytes = 0; | 743 size_t FixedAllocaAlignBytes = 0; |
739 bool PrologEmitsFixedAllocas = false; | 744 bool PrologEmitsFixedAllocas = false; |
740 uint32_t MaxOutArgsSizeBytes = 0; | 745 uint32_t MaxOutArgsSizeBytes = 0; |
741 static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet; | 746 static std::array<llvm::SmallBitVector, RCX86_NUM> TypeToRegisterSet; |
742 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> | 747 static std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> |
743 RegisterAliases; | 748 RegisterAliases; |
744 static llvm::SmallBitVector ScratchRegs; | 749 static llvm::SmallBitVector ScratchRegs; |
745 llvm::SmallBitVector RegsUsed; | 750 llvm::SmallBitVector RegsUsed; |
746 std::array<VarList, IceType_NUM> PhysicalRegisters; | 751 std::array<VarList, IceType_NUM> PhysicalRegisters; |
| 752 // GotVar is a Variable that holds the GlobalOffsetTable address for Non-SFI |
| 753 // mode. |
| 754 Variable *GotVar = nullptr; |
747 | 755 |
748 /// Randomize a given immediate operand | 756 /// Randomize a given immediate operand |
749 Operand *randomizeOrPoolImmediate(Constant *Immediate, | 757 Operand *randomizeOrPoolImmediate(Constant *Immediate, |
750 int32_t RegNum = Variable::NoRegister); | 758 int32_t RegNum = Variable::NoRegister); |
751 X86OperandMem * | 759 X86OperandMem * |
752 randomizeOrPoolImmediate(X86OperandMem *MemOperand, | 760 randomizeOrPoolImmediate(X86OperandMem *MemOperand, |
753 int32_t RegNum = Variable::NoRegister); | 761 int32_t RegNum = Variable::NoRegister); |
754 bool RandomizationPoolingPaused = false; | 762 bool RandomizationPoolingPaused = false; |
755 | 763 |
756 private: | 764 private: |
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804 void lowerSelectMove(Variable *Dest, BrCond Cond, Operand *SrcT, | 812 void lowerSelectMove(Variable *Dest, BrCond Cond, Operand *SrcT, |
805 Operand *SrcF); | 813 Operand *SrcF); |
806 void lowerSelectIntMove(Variable *Dest, BrCond Cond, Operand *SrcT, | 814 void lowerSelectIntMove(Variable *Dest, BrCond Cond, Operand *SrcT, |
807 Operand *SrcF); | 815 Operand *SrcF); |
808 /// Generic helper to move an arbitrary type from Src to Dest. | 816 /// Generic helper to move an arbitrary type from Src to Dest. |
809 void lowerMove(Variable *Dest, Operand *Src, bool IsRedefinition); | 817 void lowerMove(Variable *Dest, Operand *Src, bool IsRedefinition); |
810 | 818 |
811 /// Optimizations for idiom recognition. | 819 /// Optimizations for idiom recognition. |
812 bool lowerOptimizeFcmpSelect(const InstFcmp *Fcmp, const InstSelect *Select); | 820 bool lowerOptimizeFcmpSelect(const InstFcmp *Fcmp, const InstSelect *Select); |
813 | 821 |
| 822 /// Emit code that initializes the value of the GotVar near the start of the |
| 823 /// function. (This code is emitted only in Non-SFI mode.) |
| 824 void initGotVarIfNeeded(); |
| 825 |
814 /// Complains loudly if invoked because the cpu can handle 64-bit types | 826 /// Complains loudly if invoked because the cpu can handle 64-bit types |
815 /// natively. | 827 /// natively. |
816 template <typename T = Traits> | 828 template <typename T = Traits> |
817 typename std::enable_if<T::Is64Bit, void>::type lowerIcmp64(const InstIcmp *, | 829 typename std::enable_if<T::Is64Bit, void>::type lowerIcmp64(const InstIcmp *, |
818 const Inst *) { | 830 const Inst *) { |
819 llvm::report_fatal_error( | 831 llvm::report_fatal_error( |
820 "Hey, yo! This is x86-64. Watcha doin'? (lowerIcmp64)"); | 832 "Hey, yo! This is x86-64. Watcha doin'? (lowerIcmp64)"); |
821 } | 833 } |
822 /// x86lowerIcmp64 handles 64-bit icmp lowering. | 834 /// x86lowerIcmp64 handles 64-bit icmp lowering. |
823 template <typename T = Traits> | 835 template <typename T = Traits> |
824 typename std::enable_if<!T::Is64Bit, void>::type | 836 typename std::enable_if<!T::Is64Bit, void>::type |
825 lowerIcmp64(const InstIcmp *Icmp, const Inst *Consumer); | 837 lowerIcmp64(const InstIcmp *Icmp, const Inst *Consumer); |
826 | 838 |
827 BoolFolding FoldingInfo; | 839 BoolFolding FoldingInfo; |
| 840 |
| 841 static FixupKind PcRelFixup; |
| 842 static FixupKind AbsFixup; |
828 }; | 843 }; |
829 } // end of namespace X86NAMESPACE | 844 } // end of namespace X86NAMESPACE |
830 } // end of namespace Ice | 845 } // end of namespace Ice |
831 | 846 |
832 #include "IceTargetLoweringX86BaseImpl.h" | 847 #include "IceTargetLoweringX86BaseImpl.h" |
833 | 848 |
834 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H | 849 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H |
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