Subzero: Add Non-SFI support for x86-32.

src/IceTargetLoweringX8664.cpp

 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 14 matching lines @@
 std::unique_ptr<::Ice::TargetDataLowering>
 createTargetDataLowering(::Ice::GlobalContext *Ctx) {
   return ::Ice::X8664::TargetDataX8664::create(Ctx);
 }
 
 std::unique_ptr<::Ice::TargetHeaderLowering>
 createTargetHeaderLowering(::Ice::GlobalContext *Ctx) {
   return ::Ice::X8664::TargetHeaderX8664::create(Ctx);
 }
 
-void staticInit() { ::Ice::X8664::TargetX8664::staticInit(); }
+void staticInit(const ::Ice::ClFlags &Flags) {
+  ::Ice::X8664::TargetX8664::staticInit(Flags);
+}
 } // end of namespace X8664
 
 namespace Ice {
 namespace X8664 {
 
 //------------------------------------------------------------------------------
 //      ______   ______     ______     __     ______   ______
 //     /\__  _\ /\  == \   /\  __ \   /\ \   /\__  _\ /\  ___\
 //     \/_/\ \/ \ \  __<   \ \  __ \  \ \ \  \/_/\ \/ \ \___  \
 //        \ \_\  \ \_\ \_\  \ \_\ \_\  \ \_\    \ \_\  \/\_____\
@@ skipping 59 matching lines @@
 
 template <>
 std::array<llvm::SmallBitVector,
            TargetX86Base<X8664::Traits>::Traits::RegisterSet::Reg_NUM>
     TargetX86Base<X8664::Traits>::RegisterAliases = {{}};
 
 template <>
 llvm::SmallBitVector
     TargetX86Base<X8664::Traits>::ScratchRegs = llvm::SmallBitVector();
 
+template <>
+FixupKind TargetX86Base<X8664::Traits>::PcRelFixup =
+    TargetX86Base<X8664::Traits>::Traits::FK_PcRel;
+
+template <>
+FixupKind TargetX86Base<X8664::Traits>::AbsFixup =
+    TargetX86Base<X8664::Traits>::Traits::FK_Abs;
+
 //------------------------------------------------------------------------------
 //     __      ______  __     __  ______  ______  __  __   __  ______
 //    /\ \    /\  __ \/\ \  _ \ \/\  ___\/\  == \/\ \/\ "-.\ \/\  ___\
 //    \ \ \___\ \ \/\ \ \ \/ ".\ \ \  __\\ \  __<\ \ \ \ \-.  \ \ \__ \
 //     \ \_____\ \_____\ \__/".~\_\ \_____\ \_\ \_\ \_\ \_\\"\_\ \_____\
 //      \/_____/\/_____/\/_/   \/_/\/_____/\/_/ /_/\/_/\/_/ \/_/\/_____/
 //
 //------------------------------------------------------------------------------
 namespace {
 static inline TargetX8664::Traits::RegisterSet::AllRegisters
@@ skipping 216 matching lines @@
     _movp(Dest, ReturnReg);
   } else {
     assert(isScalarFloatingType(Dest->getType()) ||
            isScalarIntegerType(Dest->getType()));
     _mov(Dest, ReturnReg);
   }
 }
 
 void TargetX8664::lowerArguments() {
   VarList &Args = Func->getArgs();
-  // The first eight vetcor typed arguments (as well as fp arguments) are
+  // The first eight vector typed arguments (as well as fp arguments) are
   // passed in %xmm0 through %xmm7 regardless of their position in the argument
   // list.
   unsigned NumXmmArgs = 0;
   // The first six integer typed arguments are passed in %rdi, %rsi, %rdx,
   // %rcx, %r8, and %r9 regardless of their position in the argument list.
   unsigned NumGprArgs = 0;
 
   Context.init(Func->getEntryNode());
   Context.setInsertPoint(Context.getCur());
 
@@ skipping 521 matching lines @@
     emitConstantPool<PoolTypeConverter<uint16_t>>(Ctx);
     emitConstantPool<PoolTypeConverter<uint32_t>>(Ctx);
 
     emitConstantPool<PoolTypeConverter<float>>(Ctx);
     emitConstantPool<PoolTypeConverter<double>>(Ctx);
   } break;
   }
 }
 
 void TargetDataX8664::lowerJumpTables() {
+  const bool IsPIC = Ctx->getFlags().getUseNonsfi();
   switch (Ctx->getFlags().getOutFileType()) {
   case FT_Elf: {
     ELFObjectWriter *Writer = Ctx->getObjectWriter();
     for (const JumpTableData &JumpTable : Ctx->getJumpTables())
-      Writer->writeJumpTable(JumpTable, TargetX8664::Traits::RelFixup);
+      Writer->writeJumpTable(JumpTable, TargetX8664::Traits::FK_Abs, IsPIC);
   } break;
   case FT_Asm:
     // Already emitted from Cfg
     break;
   case FT_Iasm: {
     if (!BuildDefs::dump())
       return;
     Ostream &Str = Ctx->getStrEmit();
     for (const JumpTableData &JT : Ctx->getJumpTables()) {
       Str << "\t.section\t.rodata." << JT.getFunctionName()
           << "$jumptable,\"a\",@progbits\n";
       Str << "\t.align\t" << typeWidthInBytes(getPointerType()) << "\n";
       Str << InstJumpTable::makeName(JT.getFunctionName(), JT.getId()) << ":";
 
       // On X8664 ILP32 pointers are 32-bit hence the use of .long
       for (intptr_t TargetOffset : JT.getTargetOffsets())
         Str << "\n\t.long\t" << JT.getFunctionName() << "+" << TargetOffset;
       Str << "\n";
     }
   } break;
   }
 }
 
 void TargetDataX8664::lowerGlobals(const VariableDeclarationList &Vars,
                                    const IceString &SectionSuffix) {
+  const bool IsPIC = Ctx->getFlags().getUseNonsfi();
   switch (Ctx->getFlags().getOutFileType()) {
   case FT_Elf: {
     ELFObjectWriter *Writer = Ctx->getObjectWriter();
-    Writer->writeDataSection(Vars, TargetX8664::Traits::RelFixup,
-                             SectionSuffix);
+    Writer->writeDataSection(Vars, TargetX8664::Traits::FK_Abs, SectionSuffix,
+                             IsPIC);
   } break;
   case FT_Asm:
   case FT_Iasm: {
     const IceString &TranslateOnly = Ctx->getFlags().getTranslateOnly();
     OstreamLocker L(Ctx);
     for (const VariableDeclaration *Var : Vars) {
       if (GlobalContext::matchSymbolName(Var->getName(), TranslateOnly)) {
         emitGlobal(*Var, SectionSuffix);
       }
     }
@@ skipping 100 matching lines @@
 #define X(tag, sizeLog2, align, elts, elty, str)                               \
   static_assert(_table1_##tag == _table2_##tag,                                \
                 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE");
 ICETYPE_TABLE
 #undef X
 } // end of namespace dummy3
 } // end of anonymous namespace
 
 } // end of namespace X8664
 } // end of namespace Ice