| OLD | NEW |
| 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 56 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 67 #define X(val, name, prefix) prefix, | 67 #define X(val, name, prefix) prefix, |
| 68 SEG_REGX8632_TABLE | 68 SEG_REGX8632_TABLE |
| 69 #undef X | 69 #undef X |
| 70 }; | 70 }; |
| 71 | 71 |
| 72 void TargetX8632Traits::X86Operand::dump(const Cfg *, Ostream &Str) const { | 72 void TargetX8632Traits::X86Operand::dump(const Cfg *, Ostream &Str) const { |
| 73 if (BuildDefs::dump()) | 73 if (BuildDefs::dump()) |
| 74 Str << "<OperandX8632>"; | 74 Str << "<OperandX8632>"; |
| 75 } | 75 } |
| 76 | 76 |
| 77 TargetX8632Traits::X86OperandMem::X86OperandMem(Cfg *Func, Type Ty, | 77 TargetX8632Traits::X86OperandMem::X86OperandMem( |
| 78 Variable *Base, | 78 Cfg *Func, Type Ty, Variable *Base, Constant *Offset, Variable *Index, |
| 79 Constant *Offset, | 79 uint16_t Shift, SegmentRegisters SegmentReg, bool IsPIC) |
| 80 Variable *Index, uint16_t Shift, | |
| 81 SegmentRegisters SegmentReg) | |
| 82 : X86Operand(kMem, Ty), Base(Base), Offset(Offset), Index(Index), | 80 : X86Operand(kMem, Ty), Base(Base), Offset(Offset), Index(Index), |
| 83 Shift(Shift), SegmentReg(SegmentReg), Randomized(false) { | 81 Shift(Shift), SegmentReg(SegmentReg), IsPIC(IsPIC) { |
| 84 assert(Shift <= 3); | 82 assert(Shift <= 3); |
| 85 Vars = nullptr; | 83 Vars = nullptr; |
| 86 NumVars = 0; | 84 NumVars = 0; |
| 87 if (Base) | 85 if (Base) |
| 88 ++NumVars; | 86 ++NumVars; |
| 89 if (Index) | 87 if (Index) |
| 90 ++NumVars; | 88 ++NumVars; |
| 91 if (NumVars) { | 89 if (NumVars) { |
| 92 Vars = Func->allocateArrayOf<Variable *>(NumVars); | 90 Vars = Func->allocateArrayOf<Variable *>(NumVars); |
| 93 SizeT I = 0; | 91 SizeT I = 0; |
| 94 if (Base) | 92 if (Base) |
| 95 Vars[I++] = Base; | 93 Vars[I++] = Base; |
| 96 if (Index) | 94 if (Index) |
| 97 Vars[I++] = Index; | 95 Vars[I++] = Index; |
| 98 assert(I == NumVars); | 96 assert(I == NumVars); |
| 99 } | 97 } |
| 100 } | 98 } |
| 101 | 99 |
| 102 namespace { | 100 namespace { |
| 103 static int32_t | 101 |
| 104 GetRematerializableOffset(Variable *Var, | 102 int32_t GetRematerializableOffset(Variable *Var, |
| 105 const Ice::X8632::TargetX8632 *Target) { | 103 const Ice::X8632::TargetX8632 *Target) { |
| 106 int32_t Disp = Var->getStackOffset(); | 104 int32_t Disp = Var->getStackOffset(); |
| 107 SizeT RegNum = static_cast<SizeT>(Var->getRegNum()); | 105 SizeT RegNum = static_cast<SizeT>(Var->getRegNum()); |
| 108 if (RegNum == Target->getFrameReg()) { | 106 if (RegNum == Target->getFrameReg()) { |
| 109 Disp += Target->getFrameFixedAllocaOffset(); | 107 Disp += Target->getFrameFixedAllocaOffset(); |
| 110 } else if (RegNum != Target->getStackReg()) { | 108 } else if (RegNum != Target->getStackReg()) { |
| 111 llvm::report_fatal_error("Unexpected rematerializable register type"); | 109 llvm::report_fatal_error("Unexpected rematerializable register type"); |
| 112 } | 110 } |
| 113 return Disp; | 111 return Disp; |
| 114 } | 112 } |
| 113 |
| 114 void validateMemOperandPIC(const TargetX8632Traits::X86OperandMem *Mem, |
| 115 bool UseNonsfi) { |
| 116 if (!BuildDefs::asserts()) |
| 117 return; |
| 118 const bool HasCR = |
| 119 Mem->getOffset() && llvm::isa<ConstantRelocatable>(Mem->getOffset()); |
| 120 (void)HasCR; |
| 121 const bool IsPIC = Mem->getIsPIC(); |
| 122 (void)IsPIC; |
| 123 if (UseNonsfi) |
| 124 assert(HasCR == IsPIC); |
| 125 else |
| 126 assert(!IsPIC); |
| 127 } |
| 128 |
| 115 } // end of anonymous namespace | 129 } // end of anonymous namespace |
| 116 | 130 |
| 117 void TargetX8632Traits::X86OperandMem::emit(const Cfg *Func) const { | 131 void TargetX8632Traits::X86OperandMem::emit(const Cfg *Func) const { |
| 118 if (!BuildDefs::dump()) | 132 if (!BuildDefs::dump()) |
| 119 return; | 133 return; |
| 134 const bool UseNonsfi = Func->getContext()->getFlags().getUseNonsfi(); |
| 135 validateMemOperandPIC(this, UseNonsfi); |
| 120 const auto *Target = | 136 const auto *Target = |
| 121 static_cast<const ::Ice::X8632::TargetX8632 *>(Func->getTarget()); | 137 static_cast<const ::Ice::X8632::TargetX8632 *>(Func->getTarget()); |
| 122 // If the base is rematerializable, we need to replace it with the correct | 138 // If the base is rematerializable, we need to replace it with the correct |
| 123 // physical register (esp or ebp), and update the Offset. | 139 // physical register (esp or ebp), and update the Offset. |
| 124 int32_t Disp = 0; | 140 int32_t Disp = 0; |
| 125 if (getBase() && getBase()->isRematerializable()) { | 141 if (getBase() && getBase()->isRematerializable()) { |
| 126 Disp += GetRematerializableOffset(getBase(), Target); | 142 Disp += GetRematerializableOffset(getBase(), Target); |
| 127 } | 143 } |
| 128 // The index should never be rematerializable. But if we ever allow it, then | 144 // The index should never be rematerializable. But if we ever allow it, then |
| 129 // we should make sure the rematerialization offset is shifted by the Shift | 145 // we should make sure the rematerialization offset is shifted by the Shift |
| 130 // value. | 146 // value. |
| 131 if (getIndex()) | 147 if (getIndex()) |
| 132 assert(!getIndex()->isRematerializable()); | 148 assert(!getIndex()->isRematerializable()); |
| 133 Ostream &Str = Func->getContext()->getStrEmit(); | 149 Ostream &Str = Func->getContext()->getStrEmit(); |
| 134 if (SegmentReg != DefaultSegment) { | 150 if (SegmentReg != DefaultSegment) { |
| 135 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 151 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |
| 136 Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; | 152 Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":"; |
| 137 } | 153 } |
| 138 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading | 154 // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading |
| 139 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. | 155 // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr. |
| 140 if (getOffset() == 0 && Disp == 0) { | 156 if (getOffset() == nullptr && Disp == 0) { |
| 141 // No offset, emit nothing. | 157 // No offset, emit nothing. |
| 142 } else if (getOffset() == 0 && Disp != 0) { | 158 } else if (getOffset() == nullptr && Disp != 0) { |
| 143 Str << Disp; | 159 Str << Disp; |
| 144 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 160 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
| 145 if (getBase() == nullptr || CI->getValue() || Disp != 0) | 161 if (getBase() == nullptr || CI->getValue() || Disp != 0) |
| 146 // Emit a non-zero offset without a leading '$'. | 162 // Emit a non-zero offset without a leading '$'. |
| 147 Str << CI->getValue() + Disp; | 163 Str << CI->getValue() + Disp; |
| 148 } else if (const auto *CR = | 164 } else if (const auto *CR = |
| 149 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { | 165 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |
| 150 // TODO(sehr): ConstantRelocatable still needs updating for | 166 // TODO(sehr): ConstantRelocatable still needs updating for |
| 151 // rematerializable base/index and Disp. | 167 // rematerializable base/index and Disp. |
| 152 assert(Disp == 0); | 168 assert(Disp == 0); |
| 153 CR->emitWithoutPrefix(Target); | 169 CR->emitWithoutPrefix(Target, UseNonsfi ? "@GOTOFF" : ""); |
| 154 } else { | 170 } else { |
| 155 llvm_unreachable("Invalid offset type for x86 mem operand"); | 171 llvm_unreachable("Invalid offset type for x86 mem operand"); |
| 156 } | 172 } |
| 157 | 173 |
| 158 if (getBase() || getIndex()) { | 174 if (getBase() || getIndex()) { |
| 159 Str << "("; | 175 Str << "("; |
| 160 if (getBase()) | 176 if (getBase()) |
| 161 getBase()->emit(Func); | 177 getBase()->emit(Func); |
| 162 if (getIndex()) { | 178 if (getIndex()) { |
| 163 Str << ","; | 179 Str << ","; |
| (...skipping 74 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 238 TargetX8632Traits::Assembler *Asm) const { | 254 TargetX8632Traits::Assembler *Asm) const { |
| 239 if (SegmentReg != DefaultSegment) { | 255 if (SegmentReg != DefaultSegment) { |
| 240 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); | 256 assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM); |
| 241 Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); | 257 Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]); |
| 242 } | 258 } |
| 243 } | 259 } |
| 244 | 260 |
| 245 TargetX8632Traits::Address TargetX8632Traits::X86OperandMem::toAsmAddress( | 261 TargetX8632Traits::Address TargetX8632Traits::X86OperandMem::toAsmAddress( |
| 246 TargetX8632Traits::Assembler *Asm, | 262 TargetX8632Traits::Assembler *Asm, |
| 247 const Ice::TargetLowering *TargetLowering) const { | 263 const Ice::TargetLowering *TargetLowering) const { |
| 248 int32_t Disp = 0; | |
| 249 const auto *Target = | 264 const auto *Target = |
| 250 static_cast<const ::Ice::X8632::TargetX8632 *>(TargetLowering); | 265 static_cast<const ::Ice::X8632::TargetX8632 *>(TargetLowering); |
| 266 const bool UseNonsfi = Target->getGlobalContext()->getFlags().getUseNonsfi(); |
| 267 validateMemOperandPIC(this, UseNonsfi); |
| 268 int32_t Disp = 0; |
| 251 if (getBase() && getBase()->isRematerializable()) { | 269 if (getBase() && getBase()->isRematerializable()) { |
| 252 Disp += GetRematerializableOffset(getBase(), Target); | 270 Disp += GetRematerializableOffset(getBase(), Target); |
| 253 } | 271 } |
| 254 // The index should never be rematerializable. But if we ever allow it, then | 272 // The index should never be rematerializable. But if we ever allow it, then |
| 255 // we should make sure the rematerialization offset is shifted by the Shift | 273 // we should make sure the rematerialization offset is shifted by the Shift |
| 256 // value. | 274 // value. |
| 257 if (getIndex()) | 275 if (getIndex()) |
| 258 assert(!getIndex()->isRematerializable()); | 276 assert(!getIndex()->isRematerializable()); |
| 259 AssemblerFixup *Fixup = nullptr; | 277 AssemblerFixup *Fixup = nullptr; |
| 260 // Determine the offset (is it relocatable?) | 278 // Determine the offset (is it relocatable?) |
| 261 if (getOffset()) { | 279 if (getOffset()) { |
| 262 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 280 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
| 263 Disp += static_cast<int32_t>(CI->getValue()); | 281 Disp += static_cast<int32_t>(CI->getValue()); |
| 264 } else if (const auto CR = | 282 } else if (const auto CR = |
| 265 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { | 283 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |
| 266 Disp += CR->getOffset(); | 284 Disp += CR->getOffset(); |
| 267 Fixup = Asm->createFixup(RelFixup, CR); | 285 Fixup = Asm->createFixup(Target->getAbsFixup(), CR); |
| 268 } else { | 286 } else { |
| 269 llvm_unreachable("Unexpected offset type"); | 287 llvm_unreachable("Unexpected offset type"); |
| 270 } | 288 } |
| 271 } | 289 } |
| 272 | 290 |
| 273 // Now convert to the various possible forms. | 291 // Now convert to the various possible forms. |
| 274 if (getBase() && getIndex()) { | 292 if (getBase() && getIndex()) { |
| 275 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), | 293 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), |
| 276 getEncodedGPR(getIndex()->getRegNum()), | 294 getEncodedGPR(getIndex()->getRegNum()), |
| 277 X8632::Traits::ScaleFactor(getShift()), Disp, | 295 X8632::Traits::ScaleFactor(getShift()), Disp, |
| (...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 328 Var->dump(Func); | 346 Var->dump(Func); |
| 329 else | 347 else |
| 330 Var->dump(Str); | 348 Var->dump(Str); |
| 331 Str << ")"; | 349 Str << ")"; |
| 332 } | 350 } |
| 333 | 351 |
| 334 } // namespace X8632 | 352 } // namespace X8632 |
| 335 } // end of namespace Ice | 353 } // end of namespace Ice |
| 336 | 354 |
| 337 X86INSTS_DEFINE_STATIC_DATA(X8632, X8632::Traits) | 355 X86INSTS_DEFINE_STATIC_DATA(X8632, X8632::Traits) |
| OLD | NEW |