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Side by Side Diff: src/IceInstX8664.cpp

Issue 1506653002: Subzero: Add Non-SFI support for x86-32. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Refactor the link commands Created 4 years, 11 months ago
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1 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===// 1 //===- subzero/src/IceInstX8664.cpp - X86-64 instruction implementation ---===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 46 matching lines...) Expand 10 before | Expand all | Expand 10 after
57 ICETYPEX8664_TABLE 57 ICETYPEX8664_TABLE
58 #undef X 58 #undef X
59 }; 59 };
60 60
61 void MachineTraits<TargetX8664>::X86Operand::dump(const Cfg *, 61 void MachineTraits<TargetX8664>::X86Operand::dump(const Cfg *,
62 Ostream &Str) const { 62 Ostream &Str) const {
63 if (BuildDefs::dump()) 63 if (BuildDefs::dump())
64 Str << "<OperandX8664>"; 64 Str << "<OperandX8664>";
65 } 65 }
66 66
67 MachineTraits<TargetX8664>::X86OperandMem::X86OperandMem(Cfg *Func, Type Ty, 67 MachineTraits<TargetX8664>::X86OperandMem::X86OperandMem(
68 Variable *Base, 68 Cfg *Func, Type Ty, Variable *Base, Constant *Offset, Variable *Index,
69 Constant *Offset, 69 uint16_t Shift, bool IsPIC)
70 Variable *Index,
71 uint16_t Shift)
72 : X86Operand(kMem, Ty), Base(Base), Offset(Offset), Index(Index), 70 : X86Operand(kMem, Ty), Base(Base), Offset(Offset), Index(Index),
73 Shift(Shift) { 71 Shift(Shift), IsPIC(IsPIC) {
74 assert(Shift <= 3); 72 assert(Shift <= 3);
75 Vars = nullptr; 73 Vars = nullptr;
76 NumVars = 0; 74 NumVars = 0;
77 if (Base) 75 if (Base)
78 ++NumVars; 76 ++NumVars;
79 if (Index) 77 if (Index)
80 ++NumVars; 78 ++NumVars;
81 if (NumVars) { 79 if (NumVars) {
82 Vars = Func->allocateArrayOf<Variable *>(NumVars); 80 Vars = Func->allocateArrayOf<Variable *>(NumVars);
83 SizeT I = 0; 81 SizeT I = 0;
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
126 } else if (getOffset() == nullptr && Disp != 0) { 124 } else if (getOffset() == nullptr && Disp != 0) {
127 Str << Disp; 125 Str << Disp;
128 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) { 126 } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(Offset)) {
129 if (Base == nullptr || CI->getValue() || Disp != 0) 127 if (Base == nullptr || CI->getValue() || Disp != 0)
130 // Emit a non-zero offset without a leading '$'. 128 // Emit a non-zero offset without a leading '$'.
131 Str << CI->getValue() + Disp; 129 Str << CI->getValue() + Disp;
132 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) { 130 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) {
133 // TODO(sehr): ConstantRelocatable still needs updating for 131 // TODO(sehr): ConstantRelocatable still needs updating for
134 // rematerializable base/index and Disp. 132 // rematerializable base/index and Disp.
135 assert(Disp == 0); 133 assert(Disp == 0);
136 CR->emitWithoutPrefix(Func->getTarget()); 134 const bool UseNonsfi = Func->getContext()->getFlags().getUseNonsfi();
135 CR->emitWithoutPrefix(Func->getTarget(), UseNonsfi ? "@GOTOFF" : "");
137 } else { 136 } else {
138 llvm_unreachable("Invalid offset type for x86 mem operand"); 137 llvm_unreachable("Invalid offset type for x86 mem operand");
139 } 138 }
140 139
141 if (Base || Index) { 140 if (Base || Index) {
142 Str << "("; 141 Str << "(";
143 if (Base) { 142 if (Base) {
144 const Variable *Base32 = Base; 143 const Variable *Base32 = Base;
145 if (Base->getType() != IceType_i32) { 144 if (Base->getType() != IceType_i32) {
146 // X86-64 is ILP32, but %rsp and %rbp are accessed as 64-bit registers. 145 // X86-64 is ILP32, but %rsp and %rbp are accessed as 64-bit registers.
(...skipping 87 matching lines...) Expand 10 before | Expand all | Expand 10 after
234 } 233 }
235 if (getIndex()) 234 if (getIndex())
236 assert(!getIndex()->isRematerializable()); 235 assert(!getIndex()->isRematerializable());
237 AssemblerFixup *Fixup = nullptr; 236 AssemblerFixup *Fixup = nullptr;
238 // Determine the offset (is it relocatable?) 237 // Determine the offset (is it relocatable?)
239 if (getOffset() != nullptr) { 238 if (getOffset() != nullptr) {
240 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { 239 if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
241 Disp += static_cast<int32_t>(CI->getValue()); 240 Disp += static_cast<int32_t>(CI->getValue());
242 } else if (const auto CR = 241 } else if (const auto CR =
243 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { 242 llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
244 Disp += CR->getOffset(); 243 Disp = CR->getOffset();
245 Fixup = Asm->createFixup(RelFixup, CR); 244 Fixup = Asm->createFixup(FK_Abs, CR);
246 } else { 245 } else {
247 llvm_unreachable("Unexpected offset type"); 246 llvm_unreachable("Unexpected offset type");
248 } 247 }
249 } 248 }
250 249
251 // Now convert to the various possible forms. 250 // Now convert to the various possible forms.
252 if (getBase() && getIndex()) { 251 if (getBase() && getIndex()) {
253 return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), 252 return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
254 getEncodedGPR(getIndex()->getRegNum()), 253 getEncodedGPR(getIndex()->getRegNum()),
255 X8664::Traits::ScaleFactor(getShift()), Disp, 254 X8664::Traits::ScaleFactor(getShift()), Disp,
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306 Var->dump(Func); 305 Var->dump(Func);
307 else 306 else
308 Var->dump(Str); 307 Var->dump(Str);
309 Str << ")"; 308 Str << ")";
310 } 309 }
311 310
312 } // namespace X86Internal 311 } // namespace X86Internal
313 } // end of namespace Ice 312 } // end of namespace Ice
314 313
315 X86INSTS_DEFINE_STATIC_DATA(TargetX8664) 314 X86INSTS_DEFINE_STATIC_DATA(TargetX8664)
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