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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 1506653002: Subzero: Add Non-SFI support for x86-32. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fill in part of the lit test Created 5 years ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 11 matching lines...) Expand all
22 #include "IceTargetLowering.h" 22 #include "IceTargetLowering.h"
23 23
24 namespace Ice { 24 namespace Ice {
25 25
26 class TargetMIPS32 : public TargetLowering { 26 class TargetMIPS32 : public TargetLowering {
27 TargetMIPS32() = delete; 27 TargetMIPS32() = delete;
28 TargetMIPS32(const TargetMIPS32 &) = delete; 28 TargetMIPS32(const TargetMIPS32 &) = delete;
29 TargetMIPS32 &operator=(const TargetMIPS32 &) = delete; 29 TargetMIPS32 &operator=(const TargetMIPS32 &) = delete;
30 30
31 public: 31 public:
32 static void staticInit(); 32 static void staticInit(const ClFlags &Flags);
33 // TODO(jvoung): return a unique_ptr. 33 // TODO(jvoung): return a unique_ptr.
34 static TargetMIPS32 *create(Cfg *Func) { return new TargetMIPS32(Func); } 34 static TargetMIPS32 *create(Cfg *Func) { return new TargetMIPS32(Func); }
35 35
36 void translateOm1() override; 36 void translateOm1() override;
37 void translateO2() override; 37 void translateO2() override;
38 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; 38 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override;
39 39
40 SizeT getNumRegisters() const override { return RegMIPS32::Reg_NUM; } 40 SizeT getNumRegisters() const override { return RegMIPS32::Reg_NUM; }
41 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; 41 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override;
42 IceString getRegName(SizeT RegNum, Type Ty) const override; 42 IceString getRegName(SizeT RegNum, Type Ty) const override;
(...skipping 40 matching lines...) Expand 10 before | Expand all | Expand 10 after
83 return Ty == IceType_i64; 83 return Ty == IceType_i64;
84 } 84 }
85 85
86 // TODO(ascull): what is the best size of MIPS? 86 // TODO(ascull): what is the best size of MIPS?
87 SizeT getMinJumpTableSize() const override { return 3; } 87 SizeT getMinJumpTableSize() const override { return 3; }
88 void emitJumpTable(const Cfg *Func, 88 void emitJumpTable(const Cfg *Func,
89 const InstJumpTable *JumpTable) const override; 89 const InstJumpTable *JumpTable) const override;
90 90
91 void emitVariable(const Variable *Var) const override; 91 void emitVariable(const Variable *Var) const override;
92 92
93 const char *getConstantPrefix() const final { return ""; }
94 void emit(const ConstantUndef *C) const final {
95 (void)C;
96 llvm::report_fatal_error("Not yet implemented");
97 }
98 void emit(const ConstantInteger32 *C) const final { 93 void emit(const ConstantInteger32 *C) const final {
99 (void)C; 94 (void)C;
100 llvm::report_fatal_error("Not yet implemented"); 95 llvm::report_fatal_error("Not yet implemented");
101 } 96 }
102 void emit(const ConstantInteger64 *C) const final { 97 void emit(const ConstantInteger64 *C) const final {
103 (void)C; 98 (void)C;
104 llvm::report_fatal_error("Not yet implemented"); 99 llvm::report_fatal_error("Not yet implemented");
105 } 100 }
106 void emit(const ConstantFloat *C) const final { 101 void emit(const ConstantFloat *C) const final {
107 (void)C; 102 (void)C;
108 llvm::report_fatal_error("Not yet implemented"); 103 llvm::report_fatal_error("Not yet implemented");
109 } 104 }
110 void emit(const ConstantDouble *C) const final { 105 void emit(const ConstantDouble *C) const final {
111 (void)C; 106 (void)C;
112 llvm::report_fatal_error("Not yet implemented"); 107 llvm::report_fatal_error("Not yet implemented");
113 } 108 }
109 void emit(const ConstantUndef *C) const final {
110 (void)C;
111 llvm::report_fatal_error("Not yet implemented");
112 }
113 void emit(const ConstantRelocatable *C) const final {
114 (void)C;
115 llvm::report_fatal_error("Not yet implemented");
116 }
114 117
115 // The following are helpers that insert lowered MIPS32 instructions with 118 // The following are helpers that insert lowered MIPS32 instructions with
116 // minimal syntactic overhead, so that the lowering code can look as close to 119 // minimal syntactic overhead, so that the lowering code can look as close to
117 // assembly as practical. 120 // assembly as practical.
118 void _add(Variable *Dest, Variable *Src0, Variable *Src1) { 121 void _add(Variable *Dest, Variable *Src0, Variable *Src1) {
119 Context.insert<InstMIPS32Add>(Dest, Src0, Src1); 122 Context.insert<InstMIPS32Add>(Dest, Src0, Src1);
120 } 123 }
121 124
122 void _and(Variable *Dest, Variable *Src0, Variable *Src1) { 125 void _and(Variable *Dest, Variable *Src0, Variable *Src1) {
123 Context.insert<InstMIPS32And>(Dest, Src0, Src1); 126 Context.insert<InstMIPS32And>(Dest, Src0, Src1);
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
177 /// the helpers will create a new Operand and emit instructions that 180 /// the helpers will create a new Operand and emit instructions that
178 /// guarantee that the Operand kind is one of those indicated by the 181 /// guarantee that the Operand kind is one of those indicated by the
179 /// LegalMask (a bitmask of allowed kinds). If the input Operand is known 182 /// LegalMask (a bitmask of allowed kinds). If the input Operand is known
180 /// to already meet the constraints, it may be simply returned as the result, 183 /// to already meet the constraints, it may be simply returned as the result,
181 /// without creating any new instructions or operands. 184 /// without creating any new instructions or operands.
182 enum OperandLegalization { 185 enum OperandLegalization {
183 Legal_None = 0, 186 Legal_None = 0,
184 Legal_Reg = 1 << 0, // physical register, not stack location 187 Legal_Reg = 1 << 0, // physical register, not stack location
185 Legal_Imm = 1 << 1, 188 Legal_Imm = 1 << 1,
186 Legal_Mem = 1 << 2, 189 Legal_Mem = 1 << 2,
187 Legal_All = ~Legal_None 190 Legal_Default = ~Legal_None
188 }; 191 };
189 typedef uint32_t LegalMask; 192 typedef uint32_t LegalMask;
190 Operand *legalize(Operand *From, LegalMask Allowed = Legal_All, 193 Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default,
191 int32_t RegNum = Variable::NoRegister); 194 int32_t RegNum = Variable::NoRegister);
192 195
193 Variable *legalizeToVar(Operand *From, int32_t RegNum = Variable::NoRegister); 196 Variable *legalizeToVar(Operand *From, int32_t RegNum = Variable::NoRegister);
194 197
195 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister); 198 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister);
196 199
197 Variable *makeReg(Type Ty, int32_t RegNum = Variable::NoRegister); 200 Variable *makeReg(Type Ty, int32_t RegNum = Variable::NoRegister);
198 static Type stackSlotType(); 201 static Type stackSlotType();
199 Variable *copyToReg(Operand *Src, int32_t RegNum = Variable::NoRegister); 202 Variable *copyToReg(Operand *Src, int32_t RegNum = Variable::NoRegister);
200 203
(...skipping 97 matching lines...) Expand 10 before | Expand all | Expand 10 after
298 protected: 301 protected:
299 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 302 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
300 303
301 private: 304 private:
302 ~TargetHeaderMIPS32() = default; 305 ~TargetHeaderMIPS32() = default;
303 }; 306 };
304 307
305 } // end of namespace Ice 308 } // end of namespace Ice
306 309
307 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 310 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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