Subzero: Add Non-SFI support for x86-32.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 59 matching lines @@
 };
 
 void MachineTraits<TargetX8632>::X86Operand::dump(const Cfg *,
                                                   Ostream &Str) const {
   if (BuildDefs::dump())
     Str << "<OperandX8632>";
 }
 
 MachineTraits<TargetX8632>::X86OperandMem::X86OperandMem(
     Cfg *Func, Type Ty, Variable *Base, Constant *Offset, Variable *Index,
-    uint16_t Shift, SegmentRegisters SegmentReg)
+    uint16_t Shift, SegmentRegisters SegmentReg, bool IsPIC)
     : X86Operand(kMem, Ty), Base(Base), Offset(Offset), Index(Index),
-      Shift(Shift), SegmentReg(SegmentReg), Randomized(false) {
+      Shift(Shift), SegmentReg(SegmentReg), IsPIC(IsPIC) {
   assert(Shift <= 3);
   Vars = nullptr;
   NumVars = 0;
   if (Base)
     ++NumVars;
   if (Index)
     ++NumVars;
   if (NumVars) {
     Vars = Func->allocateArrayOf<Variable *>(NumVars);
     SizeT I = 0;
     if (Base)
       Vars[I++] = Base;
     if (Index)
       Vars[I++] = Index;
     assert(I == NumVars);
   }
 }
 
 namespace {
-static int32_t GetRematerializableOffset(Variable *Var,
-                                         const Ice::TargetX8632 *Target) {
+
+int32_t GetRematerializableOffset(Variable *Var,
+                                  const Ice::TargetX8632 *Target) {
   int32_t Disp = Var->getStackOffset();
   SizeT RegNum = static_cast<SizeT>(Var->getRegNum());
   if (RegNum == Target->getFrameReg()) {
     Disp += Target->getFrameFixedAllocaOffset();
   } else if (RegNum != Target->getStackReg()) {
     llvm::report_fatal_error("Unexpected rematerializable register type");
   }
   return Disp;
 }
+
+void validateMemOperandPIC(const MachineTraits<TargetX8632>::X86OperandMem *Mem,
+                           bool UseNonsfi) {
+  if (!BuildDefs::asserts())
+    return;
+  const bool HasCR =
+      Mem->getOffset() && llvm::isa<ConstantRelocatable>(Mem->getOffset());
+  (void)HasCR;
+  const bool IsPIC = Mem->getIsPIC();
+  (void)IsPIC;
+  if (UseNonsfi)
+    assert(HasCR == IsPIC);
+  else
+    assert(!IsPIC);
+}
+
 } // end of anonymous namespace
 
 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
+  const bool UseNonsfi = Func->getContext()->getFlags().getUseNonsfi();
+  validateMemOperandPIC(this, UseNonsfi);
   const auto *Target = static_cast<const Ice::TargetX8632 *>(Func->getTarget());
   // If the base is rematerializable, we need to replace it with the correct
   // physical register (esp or ebp), and update the Offset.
   int32_t Disp = 0;
   if (getBase() && getBase()->isRematerializable()) {
     Disp += GetRematerializableOffset(getBase(), Target);
   }
   // The index should never be rematerializable.  But if we ever allow it, then
   // we should make sure the rematerialization offset is shifted by the Shift
   // value.
   if (getIndex())
     assert(!getIndex()->isRematerializable());
   Ostream &Str = Func->getContext()->getStrEmit();
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":";
   }
   // Emit as Offset(Base,Index,1<<Shift). Offset is emitted without the leading
   // '$'. Omit the (Base,Index,1<<Shift) part if Base==nullptr.
-  if (getOffset() == 0 && Disp == 0) {
+  if (getOffset() == nullptr && Disp == 0) {
     // No offset, emit nothing.
-  } else if (getOffset() == 0 && Disp != 0) {
+  } else if (getOffset() == nullptr && Disp != 0) {
     Str << Disp;
   } else if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
     if (getBase() == nullptr || CI->getValue() || Disp != 0)
       // Emit a non-zero offset without a leading '$'.
       Str << CI->getValue() + Disp;
   } else if (const auto *CR =
                  llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
     // TODO(sehr): ConstantRelocatable still needs updating for
     // rematerializable base/index and Disp.
     assert(Disp == 0);
-    CR->emitWithoutPrefix(Target);
+    CR->emitWithoutPrefix(Target, UseNonsfi ? "@GOTOFF" : "");
   } else {
     llvm_unreachable("Invalid offset type for x86 mem operand");
   }
 
   if (getBase() || getIndex()) {
     Str << "(";
     if (getBase())
       getBase()->emit(Func);
     if (getIndex()) {
       Str << ",";
@@ skipping 74 matching lines @@
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Asm->emitSegmentOverride(X8632::Traits::InstSegmentPrefixes[SegmentReg]);
   }
 }
 
 MachineTraits<TargetX8632>::Address
 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress(
     MachineTraits<TargetX8632>::Assembler *Asm,
     const Ice::TargetLowering *TargetLowering) const {
+  const auto *Target = static_cast<const Ice::TargetX8632 *>(TargetLowering);
+  const bool UseNonsfi = Target->getGlobalContext()->getFlags().getUseNonsfi();
+  validateMemOperandPIC(this, UseNonsfi);
   int32_t Disp = 0;
-  const auto *Target = static_cast<const Ice::TargetX8632 *>(TargetLowering);
   if (getBase() && getBase()->isRematerializable()) {
     Disp += GetRematerializableOffset(getBase(), Target);
   }
   // The index should never be rematerializable.  But if we ever allow it, then
   // we should make sure the rematerialization offset is shifted by the Shift
   // value.
   if (getIndex())
     assert(!getIndex()->isRematerializable());
   AssemblerFixup *Fixup = nullptr;
   // Determine the offset (is it relocatable?)
   if (getOffset()) {
     if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
       Disp += static_cast<int32_t>(CI->getValue());
     } else if (const auto CR =
                    llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
       Disp += CR->getOffset();
-      Fixup = Asm->createFixup(RelFixup, CR);
+      Fixup = Asm->createFixup(Target->getRelFixup(), CR);
     } else {
       llvm_unreachable("Unexpected offset type");
     }
   }
 
   // Now convert to the various possible forms.
   if (getBase() && getIndex()) {
     return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
                                   getEncodedGPR(getIndex()->getRegNum()),
                                   X8632::Traits::ScaleFactor(getShift()), Disp,
@@ skipping 50 matching lines @@
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // namespace X86Internal
 } // end of namespace Ice
 
 X86INSTS_DEFINE_STATIC_DATA(TargetX8632)