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Side by Side Diff: runtime/vm/assembler_mips_test.cc

Issue 15038008: Impelemnts some FPU arithmetic function for the MIPS simulator, assembler, disassembler. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/os.h" 9 #include "vm/os.h"
10 #include "vm/unit_test.h" 10 #include "vm/unit_test.h"
(...skipping 1264 matching lines...) Expand 10 before | Expand all | Expand 10 after
1275 1275
1276 1276
1277 ASSEMBLER_TEST_RUN(Addd_Inf, test) { 1277 ASSEMBLER_TEST_RUN(Addd_Inf, test) {
1278 typedef double (*SimpleCode)(); 1278 typedef double (*SimpleCode)();
1279 EXPECT(test != NULL); 1279 EXPECT(test != NULL);
1280 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()); 1280 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1281 EXPECT_EQ(isfinite(res), false); 1281 EXPECT_EQ(isfinite(res), false);
1282 } 1282 }
1283 1283
1284 1284
1285 ASSEMBLER_TEST_GENERATE(Subd, assembler) {
1286 __ LoadImmediate(F0, 2.5);
1287 __ LoadImmediate(F2, 1.5);
1288 __ subd(F4, F0, F2);
1289 __ mfc1(V0, F4);
1290 __ mfc1(V1, F5);
1291 __ Ret();
1292 }
1293
1294
1295 ASSEMBLER_TEST_RUN(Subd, test) {
1296 typedef double (*SimpleCode)();
1297 EXPECT(test != NULL);
1298 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1299 EXPECT_FLOAT_EQ(1.0, res, 0.001);
1300 }
1301
1302
1303 ASSEMBLER_TEST_GENERATE(Muld, assembler) {
1304 __ LoadImmediate(F0, 6.0);
1305 __ LoadImmediate(F2, 7.0);
1306 __ muld(F4, F0, F2);
1307 __ mfc1(V0, F4);
1308 __ mfc1(V1, F5);
1309 __ Ret();
1310 }
1311
1312
1313 ASSEMBLER_TEST_RUN(Muld, test) {
1314 typedef double (*SimpleCode)();
1315 EXPECT(test != NULL);
1316 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1317 EXPECT_FLOAT_EQ(42.0, res, 0.001);
1318 }
1319
1320
1321 ASSEMBLER_TEST_GENERATE(Divd, assembler) {
1322 __ LoadImmediate(F0, 42.0);
1323 __ LoadImmediate(F2, 7.0);
1324 __ divd(F4, F0, F2);
1325 __ mfc1(V0, F4);
1326 __ mfc1(V1, F5);
1327 __ Ret();
1328 }
1329
1330
1331 ASSEMBLER_TEST_RUN(Divd, test) {
1332 typedef double (*SimpleCode)();
1333 EXPECT(test != NULL);
1334 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1335 EXPECT_FLOAT_EQ(6.0, res, 0.001);
1336 }
1337
1338
1339 ASSEMBLER_TEST_GENERATE(Sqrtd, assembler) {
1340 __ LoadImmediate(F0, 36.0);
1341 __ sqrtd(F4, F0);
1342 __ mfc1(V0, F4);
1343 __ mfc1(V1, F5);
1344 __ Ret();
1345 }
1346
1347
1348 ASSEMBLER_TEST_RUN(Sqrtd, test) {
1349 typedef double (*SimpleCode)();
1350 EXPECT(test != NULL);
1351 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1352 EXPECT_FLOAT_EQ(6.0, res, 0.001);
1353 }
1354
1355
1285 ASSEMBLER_TEST_GENERATE(Cop1CUN, assembler) { 1356 ASSEMBLER_TEST_GENERATE(Cop1CUN, assembler) {
1286 Label is_true; 1357 Label is_true;
1287 1358
1288 __ LoadImmediate(F0, 42.0); 1359 __ LoadImmediate(F0, 42.0);
1289 __ LoadImmediate(T0, 0x7FF80000); 1360 __ LoadImmediate(T0, 0x7FF80000);
1290 __ mtc1(ZR, F2); 1361 __ mtc1(ZR, F2);
1291 __ mtc1(T0, F3); 1362 __ mtc1(T0, F3);
1292 __ LoadImmediate(V0, 42); 1363 __ LoadImmediate(V0, 42);
1293 __ cund(F0, F2); 1364 __ cund(F0, F2);
1294 __ bc1t(&is_true); 1365 __ bc1t(&is_true);
(...skipping 256 matching lines...) Expand 10 before | Expand all | Expand 10 after
1551 1622
1552 1623
1553 ASSEMBLER_TEST_RUN(Cop1CvtDL_neg, test) { 1624 ASSEMBLER_TEST_RUN(Cop1CvtDL_neg, test) {
1554 typedef double (*SimpleCode)(); 1625 typedef double (*SimpleCode)();
1555 EXPECT(test != NULL); 1626 EXPECT(test != NULL);
1556 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()); 1627 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
1557 EXPECT_FLOAT_EQ(-1.0, res, 0.001); 1628 EXPECT_FLOAT_EQ(-1.0, res, 0.001);
1558 } 1629 }
1559 1630
1560 1631
1632 ASSEMBLER_TEST_GENERATE(Cop1CvtWD, assembler) {
1633 __ LoadImmediate(F0, 42.0);
1634 __ cvtwd(F2, F0);
1635 __ mfc1(V0, F2);
1636 __ Ret();
1637 }
1638
1639
1640 ASSEMBLER_TEST_RUN(Cop1CvtWD, test) {
1641 typedef double (*SimpleCode)();
1642 EXPECT(test != NULL);
1643 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1644 }
1645
1646
1647 ASSEMBLER_TEST_GENERATE(Cop1CvtWD_neg, assembler) {
1648 __ LoadImmediate(F0, -42.0);
1649 __ cvtwd(F2, F0);
1650 __ mfc1(V0, F2);
1651 __ Ret();
1652 }
1653
1654
1655 ASSEMBLER_TEST_RUN(Cop1CvtWD_neg, test) {
1656 typedef double (*SimpleCode)();
1657 EXPECT(test != NULL);
1658 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1659 }
1660
1661
1561 // Called from assembler_test.cc. 1662 // Called from assembler_test.cc.
1562 // RA: return address. 1663 // RA: return address.
1563 // A0: context. 1664 // A0: context.
1564 // A1: value. 1665 // A1: value.
1565 // A2: growable array. 1666 // A2: growable array.
1566 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) { 1667 ASSEMBLER_TEST_GENERATE(StoreIntoObject, assembler) {
1567 __ addiu(SP, SP, Immediate(-2 * kWordSize)); 1668 __ addiu(SP, SP, Immediate(-2 * kWordSize));
1568 __ sw(CTX, Address(SP, 1 * kWordSize)); 1669 __ sw(CTX, Address(SP, 1 * kWordSize));
1569 __ sw(RA, Address(SP, 0 * kWordSize)); 1670 __ sw(RA, Address(SP, 0 * kWordSize));
1570 1671
1571 __ mov(CTX, A0); 1672 __ mov(CTX, A0);
1572 __ StoreIntoObject(A2, 1673 __ StoreIntoObject(A2,
1573 FieldAddress(A2, GrowableObjectArray::data_offset()), 1674 FieldAddress(A2, GrowableObjectArray::data_offset()),
1574 A1); 1675 A1);
1575 __ lw(RA, Address(SP, 0 * kWordSize)); 1676 __ lw(RA, Address(SP, 0 * kWordSize));
1576 __ lw(CTX, Address(SP, 1 * kWordSize)); 1677 __ lw(CTX, Address(SP, 1 * kWordSize));
1577 __ addiu(SP, SP, Immediate(2 * kWordSize)); 1678 __ addiu(SP, SP, Immediate(2 * kWordSize));
1578 __ Ret(); 1679 __ Ret();
1579 } 1680 }
1580 1681
1581 } // namespace dart 1682 } // namespace dart
1582 1683
1583 #endif // defined TARGET_ARCH_MIPS 1684 #endif // defined TARGET_ARCH_MIPS
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