Index: src/compiler/mips64/code-generator-mips64.cc |
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc |
index 692ab98f9953e77cf6908fac9c8cdae714efa561..e9d5ce81a059180ba245c09640e1f739920f2f06 100644 |
--- a/src/compiler/mips64/code-generator-mips64.cc |
+++ b/src/compiler/mips64/code-generator-mips64.cc |
@@ -646,9 +646,19 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
break; |
case kMips64Div: |
__ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); |
+ if (kArchVariant == kMips64r6) { |
+ __ seleqz(i.OutputRegister(), i.InputRegister(0), i.InputRegister(0)); |
+ } else { |
+ __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); |
+ } |
break; |
case kMips64DivU: |
__ Divu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); |
+ if (kArchVariant == kMips64r6) { |
+ __ seleqz(i.OutputRegister(), i.InputRegister(0), i.InputRegister(0)); |
+ } else { |
+ __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); |
+ } |
break; |
case kMips64Mod: |
__ Mod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); |
@@ -661,9 +671,19 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { |
break; |
case kMips64Ddiv: |
__ Ddiv(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); |
+ if (kArchVariant == kMips64r6) { |
+ __ seleqz(i.OutputRegister(), i.InputRegister(0), i.InputRegister(0)); |
+ } else { |
+ __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); |
+ } |
break; |
case kMips64DdivU: |
__ Ddivu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); |
+ if (kArchVariant == kMips64r6) { |
+ __ seleqz(i.OutputRegister(), i.InputRegister(0), i.InputRegister(0)); |
+ } else { |
+ __ Movz(i.OutputRegister(), i.InputRegister(1), i.InputRegister(1)); |
+ } |
break; |
case kMips64Dmod: |
__ Dmod(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); |