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Side by Side Diff: src/compiler/register-allocator.h

Issue 1501363002: [turbofan] regalloc: model context and function mark as reg-defined. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_REGISTER_ALLOCATOR_H_ 5 #ifndef V8_REGISTER_ALLOCATOR_H_
6 #define V8_REGISTER_ALLOCATOR_H_ 6 #define V8_REGISTER_ALLOCATOR_H_
7 7
8 #include "src/compiler/instruction.h" 8 #include "src/compiler/instruction.h"
9 #include "src/ostreams.h" 9 #include "src/ostreams.h"
10 #include "src/register-configuration.h" 10 #include "src/register-configuration.h"
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663 class SpillRange final : public ZoneObject { 663 class SpillRange final : public ZoneObject {
664 public: 664 public:
665 static const int kUnassignedSlot = -1; 665 static const int kUnassignedSlot = -1;
666 SpillRange(TopLevelLiveRange* range, Zone* zone); 666 SpillRange(TopLevelLiveRange* range, Zone* zone);
667 667
668 UseInterval* interval() const { return use_interval_; } 668 UseInterval* interval() const { return use_interval_; }
669 // Currently, only 4 or 8 byte slots are supported. 669 // Currently, only 4 or 8 byte slots are supported.
670 int ByteWidth() const; 670 int ByteWidth() const;
671 bool IsEmpty() const { return live_ranges_.empty(); } 671 bool IsEmpty() const { return live_ranges_.empty(); }
672 bool TryMerge(SpillRange* other); 672 bool TryMerge(SpillRange* other);
673 bool HasSlot() const { return assigned_slot_ != kUnassignedSlot; }
673 674
674 void set_assigned_slot(int index) { 675 void set_assigned_slot(int index) {
675 DCHECK_EQ(kUnassignedSlot, assigned_slot_); 676 DCHECK_EQ(kUnassignedSlot, assigned_slot_);
676 assigned_slot_ = index; 677 assigned_slot_ = index;
677 } 678 }
678 int assigned_slot() { 679 int assigned_slot() {
679 DCHECK_NE(kUnassignedSlot, assigned_slot_); 680 DCHECK_NE(kUnassignedSlot, assigned_slot_);
680 return assigned_slot_; 681 return assigned_slot_;
681 } 682 }
682 const ZoneVector<TopLevelLiveRange*>& live_ranges() const { 683 const ZoneVector<TopLevelLiveRange*>& live_ranges() const {
(...skipping 112 matching lines...) Expand 10 before | Expand all | Expand 10 after
795 bool RangesDefinedInDeferredStayInDeferred(); 796 bool RangesDefinedInDeferredStayInDeferred();
796 797
797 void MarkAllocated(RegisterKind kind, int index); 798 void MarkAllocated(RegisterKind kind, int index);
798 799
799 PhiMapValue* InitializePhiMap(const InstructionBlock* block, 800 PhiMapValue* InitializePhiMap(const InstructionBlock* block,
800 PhiInstruction* phi); 801 PhiInstruction* phi);
801 PhiMapValue* GetPhiMapValueFor(TopLevelLiveRange* top_range); 802 PhiMapValue* GetPhiMapValueFor(TopLevelLiveRange* top_range);
802 PhiMapValue* GetPhiMapValueFor(int virtual_register); 803 PhiMapValue* GetPhiMapValueFor(int virtual_register);
803 bool IsBlockBoundary(LifetimePosition pos) const; 804 bool IsBlockBoundary(LifetimePosition pos) const;
804 805
806 ZoneMap<TopLevelLiveRange*, int>& preassigned_slot_ranges() {
807 return preassigned_slot_ranges_;
808 }
809
805 void Print(const InstructionSequence* instructionSequence); 810 void Print(const InstructionSequence* instructionSequence);
806 void Print(const Instruction* instruction); 811 void Print(const Instruction* instruction);
807 void Print(const LiveRange* range, bool with_children = false); 812 void Print(const LiveRange* range, bool with_children = false);
808 void Print(const InstructionOperand& op); 813 void Print(const InstructionOperand& op);
809 void Print(const MoveOperands* move); 814 void Print(const MoveOperands* move);
810 void Print(const SpillRange* spill_range); 815 void Print(const SpillRange* spill_range);
811 816
812 private: 817 private:
813 int GetNextLiveRangeId(); 818 int GetNextLiveRangeId();
814 819
815 Zone* const allocation_zone_; 820 Zone* const allocation_zone_;
816 Frame* const frame_; 821 Frame* const frame_;
817 InstructionSequence* const code_; 822 InstructionSequence* const code_;
818 const char* const debug_name_; 823 const char* const debug_name_;
819 const RegisterConfiguration* const config_; 824 const RegisterConfiguration* const config_;
820 PhiMap phi_map_; 825 PhiMap phi_map_;
821 ZoneVector<int> allocatable_codes_; 826 ZoneVector<int> allocatable_codes_;
822 ZoneVector<int> allocatable_double_codes_; 827 ZoneVector<int> allocatable_double_codes_;
823 ZoneVector<BitVector*> live_in_sets_; 828 ZoneVector<BitVector*> live_in_sets_;
824 ZoneVector<BitVector*> live_out_sets_; 829 ZoneVector<BitVector*> live_out_sets_;
825 ZoneVector<TopLevelLiveRange*> live_ranges_; 830 ZoneVector<TopLevelLiveRange*> live_ranges_;
826 ZoneVector<TopLevelLiveRange*> fixed_live_ranges_; 831 ZoneVector<TopLevelLiveRange*> fixed_live_ranges_;
827 ZoneVector<TopLevelLiveRange*> fixed_double_live_ranges_; 832 ZoneVector<TopLevelLiveRange*> fixed_double_live_ranges_;
828 ZoneVector<SpillRange*> spill_ranges_; 833 ZoneVector<SpillRange*> spill_ranges_;
829 DelayedReferences delayed_references_; 834 DelayedReferences delayed_references_;
830 BitVector* assigned_registers_; 835 BitVector* assigned_registers_;
831 BitVector* assigned_double_registers_; 836 BitVector* assigned_double_registers_;
832 int virtual_register_count_; 837 int virtual_register_count_;
838 ZoneMap<TopLevelLiveRange*, int> preassigned_slot_ranges_;
Jarin 2015/12/10 18:32:59 Why is this a ZoneMap? A simple vector of pairs sh
Mircea Trofin 2015/12/11 02:17:18 Duh. Thanks for the catch! Fixed.
833 839
834 DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData); 840 DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData);
835 }; 841 };
836 842
837 843
838 class ConstraintBuilder final : public ZoneObject { 844 class ConstraintBuilder final : public ZoneObject {
839 public: 845 public:
840 explicit ConstraintBuilder(RegisterAllocationData* data); 846 explicit ConstraintBuilder(RegisterAllocationData* data);
841 847
842 // Phase 1 : insert moves to account for fixed register operands. 848 // Phase 1 : insert moves to account for fixed register operands.
(...skipping 302 matching lines...) Expand 10 before | Expand all | Expand 10 after
1145 RegisterAllocationData* const data_; 1151 RegisterAllocationData* const data_;
1146 1152
1147 DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector); 1153 DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector);
1148 }; 1154 };
1149 1155
1150 } // namespace compiler 1156 } // namespace compiler
1151 } // namespace internal 1157 } // namespace internal
1152 } // namespace v8 1158 } // namespace v8
1153 1159
1154 #endif // V8_REGISTER_ALLOCATOR_H_ 1160 #endif // V8_REGISTER_ALLOCATOR_H_
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