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1 ; Show that we know how to translate lsl. | 1 ; Show that we know how to translate lsr. |
2 | 2 |
3 ; NOTE: We use -O2 to get rid of memory stores. | 3 ; NOTE: We use -O2 to get rid of memory stores. |
4 | 4 |
5 ; REQUIRES: allow_dump | 5 ; REQUIRES: allow_dump |
6 | 6 |
7 ; Compile using standalone assembler. | 7 ; Compile using standalone assembler. |
8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ | 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ |
9 ; RUN: | FileCheck %s --check-prefix=ASM | 9 ; RUN: | FileCheck %s --check-prefix=ASM |
10 | 10 |
11 ; Show bytes in assembled standalone code. | 11 ; Show bytes in assembled standalone code. |
12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ | 12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ |
13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS | 13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS |
14 | 14 |
15 ; Compile using integrated assembler. | 15 ; Compile using integrated assembler. |
16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ | 16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ |
17 ; RUN: | FileCheck %s --check-prefix=IASM | 17 ; RUN: | FileCheck %s --check-prefix=IASM |
18 | 18 |
19 ; Show bytes in assembled integrated code. | 19 ; Show bytes in assembled integrated code. |
20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ | 20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ |
21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS | 21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS |
22 | 22 |
23 define internal i32 @ShlAmt(i32 %a) { | 23 define internal i32 @LshrAmt(i32 %a) { |
24 ; ASM-LABEL:ShlAmt: | 24 ; ASM-LABEL:LshrAmt: |
25 ; DIS-LABEL:00000000 <ShlAmt>: | 25 ; DIS-LABEL:00000000 <LshrAmt>: |
26 ; IASM-LABEL:ShlAmt: | 26 ; IASM-LABEL:LshrAmt: |
27 | 27 |
28 entry: | 28 entry: |
29 ; ASM-NEXT:.LShlAmt$entry: | 29 ; ASM-NEXT:.LLshrAmt$entry: |
30 ; IASM-NEXT:.LShlAmt$entry: | 30 ; IASM-NEXT:.LLshrAmt$entry: |
31 | 31 |
32 %shl = shl i32 %a, 23 | 32 %v = lshr i32 %a, 23 |
33 | 33 |
34 ; ASM-NEXT: lsl r0, r0, #23 | 34 ; ASM-NEXT: lsr r0, r0, #23 |
35 ; DIS-NEXT: 0: e1a00b80 | 35 ; DIS-NEXT: 0: e1a00ba0 |
36 ; IASM-NEXT: .byte 0x80 | 36 ; IASM-NEXT: .byte 0xa0 |
37 ; IASM-NEXT: .byte 0xb | 37 ; IASM-NEXT: .byte 0xb |
38 ; IASM-NEXT: .byte 0xa0 | 38 ; IASM-NEXT: .byte 0xa0 |
39 ; IASM-NEXT: .byte 0xe1 | 39 ; IASM-NEXT: .byte 0xe1 |
40 | 40 |
41 ret i32 %shl | 41 ret i32 %v |
42 } | 42 } |
43 | 43 |
44 define internal i32 @ShlReg(i32 %a, i32 %b) { | 44 define internal i32 @LshrReg(i32 %a, i32 %b) { |
45 ; ASM-LABEL:ShlReg: | 45 ; ASM-LABEL:LshrReg: |
46 ; DIS-LABEL:00000010 <ShlReg>: | 46 ; DIS-LABEL:00000010 <LshrReg>: |
47 ; IASM-LABEL:ShlReg: | 47 ; IASM-LABEL:LshrReg: |
48 | 48 |
49 entry: | 49 entry: |
50 ; ASM-NEXT:.LShlReg$entry: | 50 ; ASM-NEXT:.LLshrReg$entry: |
51 ; IASM-NEXT:.LShlReg$entry: | 51 ; IASM-NEXT:.LLshrReg$entry: |
52 | 52 |
53 %shl = shl i32 %a, %b | 53 %v = lshr i32 %a, %b |
54 | 54 |
55 ; ASM-NEXT: lsl r0, r0, r1 | 55 ; ASM-NEXT: lsr r0, r0, r1 |
56 ; DIS-NEXT: 10: e1a00110 | 56 ; DIS-NEXT: 10: e1a00130 |
57 ; IASM-NEXT: .byte 0x10 | 57 ; IASM-NEXT: .byte 0x30 |
58 ; IASM-NEXT: .byte 0x1 | 58 ; IASM-NEXT: .byte 0x1 |
59 ; IASM-NEXT: .byte 0xa0 | 59 ; IASM-NEXT: .byte 0xa0 |
60 ; IASM-NEXT: .byte 0xe1 | 60 ; IASM-NEXT: .byte 0xe1 |
61 | 61 |
62 ret i32 %shl | 62 ret i32 %v |
63 } | 63 } |
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