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Unified Diff: src/IceAssemblerX86BaseImpl.h

Issue 1497033002: Fuse icmp/fcmp with select (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: unittests work Created 5 years ago
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Index: src/IceAssemblerX86BaseImpl.h
diff --git a/src/IceAssemblerX86BaseImpl.h b/src/IceAssemblerX86BaseImpl.h
index f48529aca8df95e16e09d97c0104df2871c68769..caa6e29b57be195a2d69f186b4e3ffccb2418865 100644
--- a/src/IceAssemblerX86BaseImpl.h
+++ b/src/IceAssemblerX86BaseImpl.h
@@ -1161,9 +1161,34 @@ void AssemblerX86Base<Machine>::mulps(Type /* Ty */,
}
template <class Machine>
-void AssemblerX86Base<Machine>::minps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::minps(Type Ty, typename Traits::XmmRegister dst,
typename Traits::XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRexRB(RexTypeIrrelevant, dst, src);
+ emitUint8(0x0F);
+ emitUint8(0x5D);
+ emitXmmRegisterOperand(dst, src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::minps(Type Ty, typename Traits::XmmRegister dst,
+ const typename Traits::Address &src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRex(RexTypeIrrelevant, src, dst);
+ emitUint8(0x0F);
+ emitUint8(0x5D);
+ emitOperand(gprEncoding(dst), src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::minss(Type Ty, typename Traits::XmmRegister dst,
+ typename Traits::XmmRegister src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRexRB(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x5D);
@@ -1171,9 +1196,45 @@ void AssemblerX86Base<Machine>::minps(typename Traits::XmmRegister dst,
}
template <class Machine>
-void AssemblerX86Base<Machine>::maxps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::minss(Type Ty, typename Traits::XmmRegister dst,
+ const typename Traits::Address &src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+ emitRex(RexTypeIrrelevant, src, dst);
+ emitUint8(0x0F);
+ emitUint8(0x5D);
+ emitOperand(gprEncoding(dst), src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::maxps(Type Ty, typename Traits::XmmRegister dst,
+ typename Traits::XmmRegister src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRexRB(RexTypeIrrelevant, dst, src);
+ emitUint8(0x0F);
+ emitUint8(0x5F);
+ emitXmmRegisterOperand(dst, src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::maxps(Type Ty, typename Traits::XmmRegister dst,
+ const typename Traits::Address &src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRex(RexTypeIrrelevant, src, dst);
+ emitUint8(0x0F);
+ emitUint8(0x5F);
+ emitOperand(gprEncoding(dst), src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::maxss(Type Ty, typename Traits::XmmRegister dst,
typename Traits::XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
emitRexRB(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x5F);
@@ -1181,9 +1242,48 @@ void AssemblerX86Base<Machine>::maxps(typename Traits::XmmRegister dst,
}
template <class Machine>
-void AssemblerX86Base<Machine>::andps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::maxss(Type Ty, typename Traits::XmmRegister dst,
+ const typename Traits::Address &src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
+ emitRex(RexTypeIrrelevant, src, dst);
+ emitUint8(0x0F);
+ emitUint8(0x5F);
+ emitOperand(gprEncoding(dst), src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::andnps(Type Ty,
+ typename Traits::XmmRegister dst,
+ typename Traits::XmmRegister src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRexRB(RexTypeIrrelevant, dst, src);
+ emitUint8(0x0F);
+ emitUint8(0x55);
+ emitXmmRegisterOperand(dst, src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::andnps(Type Ty,
+ typename Traits::XmmRegister dst,
+ const typename Traits::Address &src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRex(RexTypeIrrelevant, src, dst);
+ emitUint8(0x0F);
+ emitUint8(0x55);
+ emitOperand(gprEncoding(dst), src);
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::andps(Type Ty, typename Traits::XmmRegister dst,
typename Traits::XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
emitRexRB(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x54);
@@ -1191,9 +1291,11 @@ void AssemblerX86Base<Machine>::andps(typename Traits::XmmRegister dst,
}
template <class Machine>
-void AssemblerX86Base<Machine>::andps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::andps(Type Ty, typename Traits::XmmRegister dst,
const typename Traits::Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x54);
@@ -1201,9 +1303,11 @@ void AssemblerX86Base<Machine>::andps(typename Traits::XmmRegister dst,
}
template <class Machine>
-void AssemblerX86Base<Machine>::orps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::orps(Type Ty, typename Traits::XmmRegister dst,
typename Traits::XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
emitRexRB(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x56);
@@ -1211,6 +1315,18 @@ void AssemblerX86Base<Machine>::orps(typename Traits::XmmRegister dst,
}
template <class Machine>
+void AssemblerX86Base<Machine>::orps(Type Ty, typename Traits::XmmRegister dst,
+ const typename Traits::Address &src) {
+ AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
+ emitRex(RexTypeIrrelevant, src, dst);
+ emitUint8(0x0F);
+ emitUint8(0x56);
+ emitOperand(gprEncoding(dst), src);
+}
+
+template <class Machine>
void AssemblerX86Base<Machine>::blendvps(Type /* Ty */,
typename Traits::XmmRegister dst,
typename Traits::XmmRegister src) {
@@ -1264,9 +1380,11 @@ void AssemblerX86Base<Machine>::pblendvb(Type /* Ty */,
template <class Machine>
void AssemblerX86Base<Machine>::cmpps(
- typename Traits::XmmRegister dst, typename Traits::XmmRegister src,
+ Type Ty, typename Traits::XmmRegister dst, typename Traits::XmmRegister src,
typename Traits::Cond::CmppsCond CmpCondition) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (Ty == IceType_f64)
+ emitUint8(0x66);
emitRexRB(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0xC2);
@@ -1276,9 +1394,12 @@ void AssemblerX86Base<Machine>::cmpps(
template <class Machine>
void AssemblerX86Base<Machine>::cmpps(
- typename Traits::XmmRegister dst, const typename Traits::Address &src,
+ Type Ty, typename Traits::XmmRegister dst,
+ const typename Traits::Address &src,
typename Traits::Cond::CmppsCond CmpCondition) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (Ty == IceType_f64)
+ emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0xC2);
@@ -1446,28 +1567,6 @@ void AssemblerX86Base<Machine>::shufps(Type /* Ty */,
}
template <class Machine>
-void AssemblerX86Base<Machine>::minpd(typename Traits::XmmRegister dst,
- typename Traits::XmmRegister src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRexRB(RexTypeIrrelevant, dst, src);
- emitUint8(0x0F);
- emitUint8(0x5D);
- emitXmmRegisterOperand(dst, src);
-}
-
-template <class Machine>
-void AssemblerX86Base<Machine>::maxpd(typename Traits::XmmRegister dst,
- typename Traits::XmmRegister src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRexRB(RexTypeIrrelevant, dst, src);
- emitUint8(0x0F);
- emitUint8(0x5F);
- emitXmmRegisterOperand(dst, src);
-}
-
-template <class Machine>
void AssemblerX86Base<Machine>::sqrtpd(typename Traits::XmmRegister dst) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
emitUint8(0x66);
@@ -1670,42 +1769,11 @@ void AssemblerX86Base<Machine>::sqrtss(Type Ty,
}
template <class Machine>
-void AssemblerX86Base<Machine>::xorpd(typename Traits::XmmRegister dst,
- const typename Traits::Address &src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRex(RexTypeIrrelevant, src, dst);
- emitUint8(0x0F);
- emitUint8(0x57);
- emitOperand(gprEncoding(dst), src);
-}
-
-template <class Machine>
-void AssemblerX86Base<Machine>::xorpd(typename Traits::XmmRegister dst,
- typename Traits::XmmRegister src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRexRB(RexTypeIrrelevant, dst, src);
- emitUint8(0x0F);
- emitUint8(0x57);
- emitXmmRegisterOperand(dst, src);
-}
-
-template <class Machine>
-void AssemblerX86Base<Machine>::orpd(typename Traits::XmmRegister dst,
- typename Traits::XmmRegister src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRexRB(RexTypeIrrelevant, dst, src);
- emitUint8(0x0F);
- emitUint8(0x56);
- emitXmmRegisterOperand(dst, src);
-}
-
-template <class Machine>
-void AssemblerX86Base<Machine>::xorps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::xorps(Type Ty, typename Traits::XmmRegister dst,
const typename Traits::Address &src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
emitRex(RexTypeIrrelevant, src, dst);
emitUint8(0x0F);
emitUint8(0x57);
@@ -1713,9 +1781,11 @@ void AssemblerX86Base<Machine>::xorps(typename Traits::XmmRegister dst,
}
template <class Machine>
-void AssemblerX86Base<Machine>::xorps(typename Traits::XmmRegister dst,
+void AssemblerX86Base<Machine>::xorps(Type Ty, typename Traits::XmmRegister dst,
typename Traits::XmmRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+ if (!isFloat32Asserting32Or64(Ty))
+ emitUint8(0x66);
emitRexRB(RexTypeIrrelevant, dst, src);
emitUint8(0x0F);
emitUint8(0x57);
@@ -1723,28 +1793,6 @@ void AssemblerX86Base<Machine>::xorps(typename Traits::XmmRegister dst,
}
template <class Machine>
-void AssemblerX86Base<Machine>::andpd(typename Traits::XmmRegister dst,
- const typename Traits::Address &src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRex(RexTypeIrrelevant, src, dst);
- emitUint8(0x0F);
- emitUint8(0x54);
- emitOperand(gprEncoding(dst), src);
-}
-
-template <class Machine>
-void AssemblerX86Base<Machine>::andpd(typename Traits::XmmRegister dst,
- typename Traits::XmmRegister src) {
- AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- emitUint8(0x66);
- emitRexRB(RexTypeIrrelevant, dst, src);
- emitUint8(0x0F);
- emitUint8(0x54);
- emitXmmRegisterOperand(dst, src);
-}
-
-template <class Machine>
void AssemblerX86Base<Machine>::insertps(Type Ty,
typename Traits::XmmRegister dst,
typename Traits::XmmRegister src,
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