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Side by Side Diff: src/IceInstX86Base.h

Issue 1497033002: Fuse icmp/fcmp with select (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes. Created 5 years ago
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1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===// 1 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 30 matching lines...) Expand all
41 enum InstKindX86 { 41 enum InstKindX86 {
42 k__Start = Inst::Target, 42 k__Start = Inst::Target,
43 Adc, 43 Adc,
44 AdcRMW, 44 AdcRMW,
45 Add, 45 Add,
46 AddRMW, 46 AddRMW,
47 Addps, 47 Addps,
48 Addss, 48 Addss,
49 Adjuststack, 49 Adjuststack,
50 And, 50 And,
51 Andnps,
52 Andps,
51 AndRMW, 53 AndRMW,
52 Blendvps, 54 Blendvps,
53 Br, 55 Br,
54 Bsf, 56 Bsf,
55 Bsr, 57 Bsr,
56 Bswap, 58 Bswap,
57 Call, 59 Call,
58 Cbwdq, 60 Cbwdq,
59 Cmov, 61 Cmov,
60 Cmpps, 62 Cmpps,
61 Cmpxchg, 63 Cmpxchg,
62 Cmpxchg8b, 64 Cmpxchg8b,
63 Cvt, 65 Cvt,
64 Div, 66 Div,
65 Divps, 67 Divps,
66 Divss, 68 Divss,
67 FakeRMW, 69 FakeRMW,
68 Fld, 70 Fld,
69 Fstp, 71 Fstp,
70 Icmp, 72 Icmp,
71 Idiv, 73 Idiv,
72 Imul, 74 Imul,
73 ImulImm, 75 ImulImm,
74 Insertps, 76 Insertps,
75 Jmp, 77 Jmp,
76 Label, 78 Label,
77 Lea, 79 Lea,
78 Load, 80 Load,
79 Mfence, 81 Mfence,
82 Minss,
83 Maxss,
80 Mov, 84 Mov,
81 Movd, 85 Movd,
82 Movp, 86 Movp,
83 Movq, 87 Movq,
84 MovssRegs, 88 MovssRegs,
85 Movsx, 89 Movsx,
86 Movzx, 90 Movzx,
87 Mul, 91 Mul,
88 Mulps, 92 Mulps,
89 Mulss, 93 Mulss,
90 Neg, 94 Neg,
91 Nop, 95 Nop,
92 Or, 96 Or,
97 Orps,
93 OrRMW, 98 OrRMW,
94 Padd, 99 Padd,
95 Pand, 100 Pand,
96 Pandn, 101 Pandn,
97 Pblendvb, 102 Pblendvb,
98 Pcmpeq, 103 Pcmpeq,
99 Pcmpgt, 104 Pcmpgt,
100 Pextr, 105 Pextr,
101 Pinsr, 106 Pinsr,
102 Pmull, 107 Pmull,
(...skipping 25 matching lines...) Expand all
128 Sub, 133 Sub,
129 SubRMW, 134 SubRMW,
130 Subps, 135 Subps,
131 Subss, 136 Subss,
132 Test, 137 Test,
133 Ucomiss, 138 Ucomiss,
134 UD2, 139 UD2,
135 Xadd, 140 Xadd,
136 Xchg, 141 Xchg,
137 Xor, 142 Xor,
143 Xorps,
138 XorRMW, 144 XorRMW,
139 145
140 /// Intel Architecture Code Analyzer markers. These are not executable so 146 /// Intel Architecture Code Analyzer markers. These are not executable so
141 /// must only be used for analysis. 147 /// must only be used for analysis.
142 IacaStart, 148 IacaStart,
143 IacaEnd 149 IacaEnd
144 }; 150 };
145 151
146 static const char *getWidthString(Type Ty); 152 static const char *getWidthString(Type Ty);
147 static const char *getFldString(Type Ty); 153 static const char *getFldString(Type Ty);
(...skipping 1304 matching lines...) Expand 10 before | Expand all | Expand 10 after
1452 return new (Func->allocate<InstX86And>()) InstX86And(Func, Dest, Source); 1458 return new (Func->allocate<InstX86And>()) InstX86And(Func, Dest, Source);
1453 } 1459 }
1454 1460
1455 private: 1461 private:
1456 InstX86And(Cfg *Func, Variable *Dest, Operand *Source) 1462 InstX86And(Cfg *Func, Variable *Dest, Operand *Source)
1457 : InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::And>(Func, Dest, 1463 : InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::And>(Func, Dest,
1458 Source) {} 1464 Source) {}
1459 }; 1465 };
1460 1466
1461 template <class Machine> 1467 template <class Machine>
1468 class InstX86Andnps
1469 : public InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Andnps, true> {
1470 public:
1471 static InstX86Andnps *create(Cfg *Func, Variable *Dest, Operand *Source) {
1472 return new (Func->allocate<InstX86Andnps>())
1473 InstX86Andnps(Func, Dest, Source);
1474 }
1475
1476 void emit(const Cfg *Func) const override;
1477
1478 private:
1479 InstX86Andnps(Cfg *Func, Variable *Dest, Operand *Source)
1480 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Andnps, true>(
1481 Func, Dest, Source) {}
1482 };
1483
1484 template <class Machine>
1485 class InstX86Andps
1486 : public InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Andps, true> {
1487 public:
1488 static InstX86Andps *create(Cfg *Func, Variable *Dest, Operand *Source) {
1489 return new (Func->allocate<InstX86Andps>())
1490 InstX86Andps(Func, Dest, Source);
1491 }
1492
1493 void emit(const Cfg *Func) const override;
1494
1495 private:
1496 InstX86Andps(Cfg *Func, Variable *Dest, Operand *Source)
1497 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Andps, true>(
1498 Func, Dest, Source) {}
1499 };
1500
1501 template <class Machine>
1462 class InstX86AndRMW 1502 class InstX86AndRMW
1463 : public InstX86BaseBinopRMW<Machine, InstX86Base<Machine>::AndRMW> { 1503 : public InstX86BaseBinopRMW<Machine, InstX86Base<Machine>::AndRMW> {
1464 public: 1504 public:
1465 static InstX86AndRMW * 1505 static InstX86AndRMW *
1466 create(Cfg *Func, 1506 create(Cfg *Func,
1467 typename InstX86Base<Machine>::Traits::X86OperandMem *DestSrc0, 1507 typename InstX86Base<Machine>::Traits::X86OperandMem *DestSrc0,
1468 Operand *Src1) { 1508 Operand *Src1) {
1469 return new (Func->allocate<InstX86AndRMW>()) 1509 return new (Func->allocate<InstX86AndRMW>())
1470 InstX86AndRMW(Func, DestSrc0, Src1); 1510 InstX86AndRMW(Func, DestSrc0, Src1);
1471 } 1511 }
(...skipping 29 matching lines...) Expand all
1501 InstX86Pandn(Func, Dest, Source); 1541 InstX86Pandn(Func, Dest, Source);
1502 } 1542 }
1503 1543
1504 private: 1544 private:
1505 InstX86Pandn(Cfg *Func, Variable *Dest, Operand *Source) 1545 InstX86Pandn(Cfg *Func, Variable *Dest, Operand *Source)
1506 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Pandn, false>( 1546 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Pandn, false>(
1507 Func, Dest, Source) {} 1547 Func, Dest, Source) {}
1508 }; 1548 };
1509 1549
1510 template <class Machine> 1550 template <class Machine>
1551 class InstX86Maxss
1552 : public InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Maxss, true> {
1553 public:
1554 static InstX86Maxss *create(Cfg *Func, Variable *Dest, Operand *Source) {
1555 return new (Func->allocate<InstX86Maxss>())
1556 InstX86Maxss(Func, Dest, Source);
1557 }
1558
1559 void emit(const Cfg *Func) const override;
1560
1561 private:
1562 InstX86Maxss(Cfg *Func, Variable *Dest, Operand *Source)
1563 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Maxss, true>(
1564 Func, Dest, Source) {}
1565 };
1566
1567 template <class Machine>
1568 class InstX86Minss
1569 : public InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Minss, true> {
1570 public:
1571 static InstX86Minss *create(Cfg *Func, Variable *Dest, Operand *Source) {
1572 return new (Func->allocate<InstX86Minss>())
1573 InstX86Minss(Func, Dest, Source);
1574 }
1575
1576 void emit(const Cfg *Func) const override;
1577
1578 private:
1579 InstX86Minss(Cfg *Func, Variable *Dest, Operand *Source)
1580 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Minss, true>(
1581 Func, Dest, Source) {}
1582 };
1583
1584 template <class Machine>
1511 class InstX86Or 1585 class InstX86Or
1512 : public InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::Or> { 1586 : public InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::Or> {
1513 public: 1587 public:
1514 static InstX86Or *create(Cfg *Func, Variable *Dest, Operand *Source) { 1588 static InstX86Or *create(Cfg *Func, Variable *Dest, Operand *Source) {
1515 return new (Func->allocate<InstX86Or>()) InstX86Or(Func, Dest, Source); 1589 return new (Func->allocate<InstX86Or>()) InstX86Or(Func, Dest, Source);
1516 } 1590 }
1517 1591
1518 private: 1592 private:
1519 InstX86Or(Cfg *Func, Variable *Dest, Operand *Source) 1593 InstX86Or(Cfg *Func, Variable *Dest, Operand *Source)
1520 : InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::Or>(Func, Dest, 1594 : InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::Or>(Func, Dest,
1521 Source) {} 1595 Source) {}
1522 }; 1596 };
1523 1597
1524 template <class Machine> 1598 template <class Machine>
1599 class InstX86Orps
1600 : public InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Orps, true> {
1601 public:
1602 static InstX86Orps *create(Cfg *Func, Variable *Dest, Operand *Source) {
1603 return new (Func->allocate<InstX86Orps>()) InstX86Orps(Func, Dest, Source);
1604 }
1605
1606 void emit(const Cfg *Func) const override;
1607
1608 private:
1609 InstX86Orps(Cfg *Func, Variable *Dest, Operand *Source)
1610 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Orps, true>(
1611 Func, Dest, Source) {}
1612 };
1613
1614 template <class Machine>
1525 class InstX86OrRMW 1615 class InstX86OrRMW
1526 : public InstX86BaseBinopRMW<Machine, InstX86Base<Machine>::OrRMW> { 1616 : public InstX86BaseBinopRMW<Machine, InstX86Base<Machine>::OrRMW> {
1527 public: 1617 public:
1528 static InstX86OrRMW * 1618 static InstX86OrRMW *
1529 create(Cfg *Func, 1619 create(Cfg *Func,
1530 typename InstX86Base<Machine>::Traits::X86OperandMem *DestSrc0, 1620 typename InstX86Base<Machine>::Traits::X86OperandMem *DestSrc0,
1531 Operand *Src1) { 1621 Operand *Src1) {
1532 return new (Func->allocate<InstX86OrRMW>()) 1622 return new (Func->allocate<InstX86OrRMW>())
1533 InstX86OrRMW(Func, DestSrc0, Src1); 1623 InstX86OrRMW(Func, DestSrc0, Src1);
1534 } 1624 }
(...skipping 28 matching lines...) Expand all
1563 return new (Func->allocate<InstX86Xor>()) InstX86Xor(Func, Dest, Source); 1653 return new (Func->allocate<InstX86Xor>()) InstX86Xor(Func, Dest, Source);
1564 } 1654 }
1565 1655
1566 private: 1656 private:
1567 InstX86Xor(Cfg *Func, Variable *Dest, Operand *Source) 1657 InstX86Xor(Cfg *Func, Variable *Dest, Operand *Source)
1568 : InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::Xor>(Func, Dest, 1658 : InstX86BaseBinopGPR<Machine, InstX86Base<Machine>::Xor>(Func, Dest,
1569 Source) {} 1659 Source) {}
1570 }; 1660 };
1571 1661
1572 template <class Machine> 1662 template <class Machine>
1663 class InstX86Xorps
1664 : public InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Xorps, true> {
1665 public:
1666 static InstX86Xorps *create(Cfg *Func, Variable *Dest, Operand *Source) {
1667 return new (Func->allocate<InstX86Xorps>())
1668 InstX86Xorps(Func, Dest, Source);
1669 }
1670
1671 void emit(const Cfg *Func) const override;
1672
1673 private:
1674 InstX86Xorps(Cfg *Func, Variable *Dest, Operand *Source)
1675 : InstX86BaseBinopXmm<Machine, InstX86Base<Machine>::Xorps, true>(
1676 Func, Dest, Source) {}
1677 };
1678
1679 template <class Machine>
1573 class InstX86XorRMW 1680 class InstX86XorRMW
1574 : public InstX86BaseBinopRMW<Machine, InstX86Base<Machine>::XorRMW> { 1681 : public InstX86BaseBinopRMW<Machine, InstX86Base<Machine>::XorRMW> {
1575 public: 1682 public:
1576 static InstX86XorRMW * 1683 static InstX86XorRMW *
1577 create(Cfg *Func, 1684 create(Cfg *Func,
1578 typename InstX86Base<Machine>::Traits::X86OperandMem *DestSrc0, 1685 typename InstX86Base<Machine>::Traits::X86OperandMem *DestSrc0,
1579 Operand *Src1) { 1686 Operand *Src1) {
1580 return new (Func->allocate<InstX86XorRMW>()) 1687 return new (Func->allocate<InstX86XorRMW>())
1581 InstX86XorRMW(Func, DestSrc0, Src1); 1688 InstX86XorRMW(Func, DestSrc0, Src1);
1582 } 1689 }
(...skipping 1198 matching lines...) Expand 10 before | Expand all | Expand 10 after
2781 using Sqrtss = InstX86Sqrtss<Machine>; 2888 using Sqrtss = InstX86Sqrtss<Machine>;
2782 using Mov = InstX86Mov<Machine>; 2889 using Mov = InstX86Mov<Machine>;
2783 using Movp = InstX86Movp<Machine>; 2890 using Movp = InstX86Movp<Machine>;
2784 using Movq = InstX86Movq<Machine>; 2891 using Movq = InstX86Movq<Machine>;
2785 using Add = InstX86Add<Machine>; 2892 using Add = InstX86Add<Machine>;
2786 using AddRMW = InstX86AddRMW<Machine>; 2893 using AddRMW = InstX86AddRMW<Machine>;
2787 using Addps = InstX86Addps<Machine>; 2894 using Addps = InstX86Addps<Machine>;
2788 using Adc = InstX86Adc<Machine>; 2895 using Adc = InstX86Adc<Machine>;
2789 using AdcRMW = InstX86AdcRMW<Machine>; 2896 using AdcRMW = InstX86AdcRMW<Machine>;
2790 using Addss = InstX86Addss<Machine>; 2897 using Addss = InstX86Addss<Machine>;
2898 using Andnps = InstX86Andnps<Machine>;
2899 using Andps = InstX86Andps<Machine>;
2791 using Padd = InstX86Padd<Machine>; 2900 using Padd = InstX86Padd<Machine>;
2792 using Sub = InstX86Sub<Machine>; 2901 using Sub = InstX86Sub<Machine>;
2793 using SubRMW = InstX86SubRMW<Machine>; 2902 using SubRMW = InstX86SubRMW<Machine>;
2794 using Subps = InstX86Subps<Machine>; 2903 using Subps = InstX86Subps<Machine>;
2795 using Subss = InstX86Subss<Machine>; 2904 using Subss = InstX86Subss<Machine>;
2796 using Sbb = InstX86Sbb<Machine>; 2905 using Sbb = InstX86Sbb<Machine>;
2797 using SbbRMW = InstX86SbbRMW<Machine>; 2906 using SbbRMW = InstX86SbbRMW<Machine>;
2798 using Psub = InstX86Psub<Machine>; 2907 using Psub = InstX86Psub<Machine>;
2799 using And = InstX86And<Machine>; 2908 using And = InstX86And<Machine>;
2800 using AndRMW = InstX86AndRMW<Machine>; 2909 using AndRMW = InstX86AndRMW<Machine>;
2801 using Pand = InstX86Pand<Machine>; 2910 using Pand = InstX86Pand<Machine>;
2802 using Pandn = InstX86Pandn<Machine>; 2911 using Pandn = InstX86Pandn<Machine>;
2803 using Or = InstX86Or<Machine>; 2912 using Or = InstX86Or<Machine>;
2913 using Orps = InstX86Orps<Machine>;
2804 using OrRMW = InstX86OrRMW<Machine>; 2914 using OrRMW = InstX86OrRMW<Machine>;
2805 using Por = InstX86Por<Machine>; 2915 using Por = InstX86Por<Machine>;
2806 using Xor = InstX86Xor<Machine>; 2916 using Xor = InstX86Xor<Machine>;
2917 using Xorps = InstX86Xorps<Machine>;
2807 using XorRMW = InstX86XorRMW<Machine>; 2918 using XorRMW = InstX86XorRMW<Machine>;
2808 using Pxor = InstX86Pxor<Machine>; 2919 using Pxor = InstX86Pxor<Machine>;
2920 using Maxss = InstX86Maxss<Machine>;
2921 using Minss = InstX86Minss<Machine>;
2809 using Imul = InstX86Imul<Machine>; 2922 using Imul = InstX86Imul<Machine>;
2810 using ImulImm = InstX86ImulImm<Machine>; 2923 using ImulImm = InstX86ImulImm<Machine>;
2811 using Mulps = InstX86Mulps<Machine>; 2924 using Mulps = InstX86Mulps<Machine>;
2812 using Mulss = InstX86Mulss<Machine>; 2925 using Mulss = InstX86Mulss<Machine>;
2813 using Pmull = InstX86Pmull<Machine>; 2926 using Pmull = InstX86Pmull<Machine>;
2814 using Pmuludq = InstX86Pmuludq<Machine>; 2927 using Pmuludq = InstX86Pmuludq<Machine>;
2815 using Divps = InstX86Divps<Machine>; 2928 using Divps = InstX86Divps<Machine>;
2816 using Divss = InstX86Divss<Machine>; 2929 using Divss = InstX86Divss<Machine>;
2817 using Rol = InstX86Rol<Machine>; 2930 using Rol = InstX86Rol<Machine>;
2818 using Shl = InstX86Shl<Machine>; 2931 using Shl = InstX86Shl<Machine>;
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
2889 template <> const char *InstX86Mov<Machine>::Base::Opcode = "mov"; \ 3002 template <> const char *InstX86Mov<Machine>::Base::Opcode = "mov"; \
2890 template <> const char *InstX86Movp<Machine>::Base::Opcode = "movups"; \ 3003 template <> const char *InstX86Movp<Machine>::Base::Opcode = "movups"; \
2891 template <> const char *InstX86Movq<Machine>::Base::Opcode = "movq"; \ 3004 template <> const char *InstX86Movq<Machine>::Base::Opcode = "movq"; \
2892 /* Binary ops */ \ 3005 /* Binary ops */ \
2893 template <> const char *InstX86Add<Machine>::Base::Opcode = "add"; \ 3006 template <> const char *InstX86Add<Machine>::Base::Opcode = "add"; \
2894 template <> const char *InstX86AddRMW<Machine>::Base::Opcode = "add"; \ 3007 template <> const char *InstX86AddRMW<Machine>::Base::Opcode = "add"; \
2895 template <> const char *InstX86Addps<Machine>::Base::Opcode = "addps"; \ 3008 template <> const char *InstX86Addps<Machine>::Base::Opcode = "addps"; \
2896 template <> const char *InstX86Adc<Machine>::Base::Opcode = "adc"; \ 3009 template <> const char *InstX86Adc<Machine>::Base::Opcode = "adc"; \
2897 template <> const char *InstX86AdcRMW<Machine>::Base::Opcode = "adc"; \ 3010 template <> const char *InstX86AdcRMW<Machine>::Base::Opcode = "adc"; \
2898 template <> const char *InstX86Addss<Machine>::Base::Opcode = "addss"; \ 3011 template <> const char *InstX86Addss<Machine>::Base::Opcode = "addss"; \
3012 template <> const char *InstX86Andnps<Machine>::Base::Opcode = "andn"; \
3013 template <> const char *InstX86Andps<Machine>::Base::Opcode = "and"; \
3014 template <> const char *InstX86Maxss<Machine>::Base::Opcode = "max"; \
3015 template <> const char *InstX86Minss<Machine>::Base::Opcode = "min"; \
2899 template <> const char *InstX86Padd<Machine>::Base::Opcode = "padd"; \ 3016 template <> const char *InstX86Padd<Machine>::Base::Opcode = "padd"; \
2900 template <> const char *InstX86Sub<Machine>::Base::Opcode = "sub"; \ 3017 template <> const char *InstX86Sub<Machine>::Base::Opcode = "sub"; \
2901 template <> const char *InstX86SubRMW<Machine>::Base::Opcode = "sub"; \ 3018 template <> const char *InstX86SubRMW<Machine>::Base::Opcode = "sub"; \
2902 template <> const char *InstX86Subps<Machine>::Base::Opcode = "subps"; \ 3019 template <> const char *InstX86Subps<Machine>::Base::Opcode = "subps"; \
2903 template <> const char *InstX86Subss<Machine>::Base::Opcode = "subss"; \ 3020 template <> const char *InstX86Subss<Machine>::Base::Opcode = "subss"; \
2904 template <> const char *InstX86Sbb<Machine>::Base::Opcode = "sbb"; \ 3021 template <> const char *InstX86Sbb<Machine>::Base::Opcode = "sbb"; \
2905 template <> const char *InstX86SbbRMW<Machine>::Base::Opcode = "sbb"; \ 3022 template <> const char *InstX86SbbRMW<Machine>::Base::Opcode = "sbb"; \
2906 template <> const char *InstX86Psub<Machine>::Base::Opcode = "psub"; \ 3023 template <> const char *InstX86Psub<Machine>::Base::Opcode = "psub"; \
2907 template <> const char *InstX86And<Machine>::Base::Opcode = "and"; \ 3024 template <> const char *InstX86And<Machine>::Base::Opcode = "and"; \
2908 template <> const char *InstX86AndRMW<Machine>::Base::Opcode = "and"; \ 3025 template <> const char *InstX86AndRMW<Machine>::Base::Opcode = "and"; \
2909 template <> const char *InstX86Pand<Machine>::Base::Opcode = "pand"; \ 3026 template <> const char *InstX86Pand<Machine>::Base::Opcode = "pand"; \
2910 template <> const char *InstX86Pandn<Machine>::Base::Opcode = "pandn"; \ 3027 template <> const char *InstX86Pandn<Machine>::Base::Opcode = "pandn"; \
2911 template <> const char *InstX86Or<Machine>::Base::Opcode = "or"; \ 3028 template <> const char *InstX86Or<Machine>::Base::Opcode = "or"; \
3029 template <> const char *InstX86Orps<Machine>::Base::Opcode = "or"; \
2912 template <> const char *InstX86OrRMW<Machine>::Base::Opcode = "or"; \ 3030 template <> const char *InstX86OrRMW<Machine>::Base::Opcode = "or"; \
2913 template <> const char *InstX86Por<Machine>::Base::Opcode = "por"; \ 3031 template <> const char *InstX86Por<Machine>::Base::Opcode = "por"; \
2914 template <> const char *InstX86Xor<Machine>::Base::Opcode = "xor"; \ 3032 template <> const char *InstX86Xor<Machine>::Base::Opcode = "xor"; \
3033 template <> const char *InstX86Xorps<Machine>::Base::Opcode = "xor"; \
2915 template <> const char *InstX86XorRMW<Machine>::Base::Opcode = "xor"; \ 3034 template <> const char *InstX86XorRMW<Machine>::Base::Opcode = "xor"; \
2916 template <> const char *InstX86Pxor<Machine>::Base::Opcode = "pxor"; \ 3035 template <> const char *InstX86Pxor<Machine>::Base::Opcode = "pxor"; \
2917 template <> const char *InstX86Imul<Machine>::Base::Opcode = "imul"; \ 3036 template <> const char *InstX86Imul<Machine>::Base::Opcode = "imul"; \
2918 template <> const char *InstX86ImulImm<Machine>::Base::Opcode = "imul"; \ 3037 template <> const char *InstX86ImulImm<Machine>::Base::Opcode = "imul"; \
2919 template <> const char *InstX86Mulps<Machine>::Base::Opcode = "mulps"; \ 3038 template <> const char *InstX86Mulps<Machine>::Base::Opcode = "mulps"; \
2920 template <> const char *InstX86Mulss<Machine>::Base::Opcode = "mulss"; \ 3039 template <> const char *InstX86Mulss<Machine>::Base::Opcode = "mulss"; \
2921 template <> const char *InstX86Pmull<Machine>::Base::Opcode = "pmull"; \ 3040 template <> const char *InstX86Pmull<Machine>::Base::Opcode = "pmull"; \
2922 template <> const char *InstX86Pmuludq<Machine>::Base::Opcode = "pmuludq"; \ 3041 template <> const char *InstX86Pmuludq<Machine>::Base::Opcode = "pmuludq"; \
2923 template <> const char *InstX86Div<Machine>::Base::Opcode = "div"; \ 3042 template <> const char *InstX86Div<Machine>::Base::Opcode = "div"; \
2924 template <> const char *InstX86Divps<Machine>::Base::Opcode = "divps"; \ 3043 template <> const char *InstX86Divps<Machine>::Base::Opcode = "divps"; \
3044 template <> const char *InstX86Divss<Machine>::Base::Opcode = "divss"; \
2925 template <> const char *InstX86Idiv<Machine>::Base::Opcode = "idiv"; \ 3045 template <> const char *InstX86Idiv<Machine>::Base::Opcode = "idiv"; \
2926 template <> const char *InstX86Divss<Machine>::Base::Opcode = "divss"; \
2927 template <> const char *InstX86Rol<Machine>::Base::Opcode = "rol"; \ 3046 template <> const char *InstX86Rol<Machine>::Base::Opcode = "rol"; \
2928 template <> const char *InstX86Shl<Machine>::Base::Opcode = "shl"; \ 3047 template <> const char *InstX86Shl<Machine>::Base::Opcode = "shl"; \
2929 template <> const char *InstX86Psll<Machine>::Base::Opcode = "psll"; \ 3048 template <> const char *InstX86Psll<Machine>::Base::Opcode = "psll"; \
2930 template <> const char *InstX86Shr<Machine>::Base::Opcode = "shr"; \ 3049 template <> const char *InstX86Shr<Machine>::Base::Opcode = "shr"; \
2931 template <> const char *InstX86Sar<Machine>::Base::Opcode = "sar"; \ 3050 template <> const char *InstX86Sar<Machine>::Base::Opcode = "sar"; \
2932 template <> const char *InstX86Psra<Machine>::Base::Opcode = "psra"; \ 3051 template <> const char *InstX86Psra<Machine>::Base::Opcode = "psra"; \
2933 template <> const char *InstX86Psrl<Machine>::Base::Opcode = "psrl"; \ 3052 template <> const char *InstX86Psrl<Machine>::Base::Opcode = "psrl"; \
2934 template <> const char *InstX86Pcmpeq<Machine>::Base::Opcode = "pcmpeq"; \ 3053 template <> const char *InstX86Pcmpeq<Machine>::Base::Opcode = "pcmpeq"; \
2935 template <> const char *InstX86Pcmpgt<Machine>::Base::Opcode = "pcmpgt"; \ 3054 template <> const char *InstX86Pcmpgt<Machine>::Base::Opcode = "pcmpgt"; \
2936 template <> const char *InstX86MovssRegs<Machine>::Base::Opcode = "movss"; \ 3055 template <> const char *InstX86MovssRegs<Machine>::Base::Opcode = "movss"; \
(...skipping 250 matching lines...) Expand 10 before | Expand all | Expand 10 after
3187 template <> \ 3306 template <> \
3188 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \ 3307 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3189 InstX86Subss<Machine>::Base::Emitter = { \ 3308 InstX86Subss<Machine>::Base::Emitter = { \
3190 &InstX86Base<Machine>::Traits::Assembler::subss, \ 3309 &InstX86Base<Machine>::Traits::Assembler::subss, \
3191 &InstX86Base<Machine>::Traits::Assembler::subss}; \ 3310 &InstX86Base<Machine>::Traits::Assembler::subss}; \
3192 template <> \ 3311 template <> \
3193 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \ 3312 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3194 InstX86Subps<Machine>::Base::Emitter = { \ 3313 InstX86Subps<Machine>::Base::Emitter = { \
3195 &InstX86Base<Machine>::Traits::Assembler::subps, \ 3314 &InstX86Base<Machine>::Traits::Assembler::subps, \
3196 &InstX86Base<Machine>::Traits::Assembler::subps}; \ 3315 &InstX86Base<Machine>::Traits::Assembler::subps}; \
3316 template <> \
3317 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3318 InstX86Andnps<Machine>::Base::Emitter = { \
3319 &InstX86Base<Machine>::Traits::Assembler::andnps, \
3320 &InstX86Base<Machine>::Traits::Assembler::andnps}; \
3321 template <> \
3322 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3323 InstX86Andps<Machine>::Base::Emitter = { \
3324 &InstX86Base<Machine>::Traits::Assembler::andps, \
3325 &InstX86Base<Machine>::Traits::Assembler::andps}; \
3326 template <> \
3327 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3328 InstX86Maxss<Machine>::Base::Emitter = { \
3329 &InstX86Base<Machine>::Traits::Assembler::maxss, \
3330 &InstX86Base<Machine>::Traits::Assembler::maxss}; \
3331 template <> \
3332 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3333 InstX86Minss<Machine>::Base::Emitter = { \
3334 &InstX86Base<Machine>::Traits::Assembler::minss, \
3335 &InstX86Base<Machine>::Traits::Assembler::minss}; \
3336 template <> \
3337 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3338 InstX86Orps<Machine>::Base::Emitter = { \
3339 &InstX86Base<Machine>::Traits::Assembler::orps, \
3340 &InstX86Base<Machine>::Traits::Assembler::orps}; \
3341 template <> \
3342 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterRegOp \
3343 InstX86Xorps<Machine>::Base::Emitter = { \
3344 &InstX86Base<Machine>::Traits::Assembler::xorps, \
3345 &InstX86Base<Machine>::Traits::Assembler::xorps}; \
3197 \ 3346 \
3198 /* Binary XMM Shift ops */ \ 3347 /* Binary XMM Shift ops */ \
3199 template <> \ 3348 template <> \
3200 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterShiftOp \ 3349 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterShiftOp \
3201 InstX86Psll<Machine>::Base::Emitter = { \ 3350 InstX86Psll<Machine>::Base::Emitter = { \
3202 &InstX86Base<Machine>::Traits::Assembler::psll, \ 3351 &InstX86Base<Machine>::Traits::Assembler::psll, \
3203 &InstX86Base<Machine>::Traits::Assembler::psll, \ 3352 &InstX86Base<Machine>::Traits::Assembler::psll, \
3204 &InstX86Base<Machine>::Traits::Assembler::psll}; \ 3353 &InstX86Base<Machine>::Traits::Assembler::psll}; \
3205 template <> \ 3354 template <> \
3206 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterShiftOp \ 3355 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterShiftOp \
3207 InstX86Psra<Machine>::Base::Emitter = { \ 3356 InstX86Psra<Machine>::Base::Emitter = { \
3208 &InstX86Base<Machine>::Traits::Assembler::psra, \ 3357 &InstX86Base<Machine>::Traits::Assembler::psra, \
3209 &InstX86Base<Machine>::Traits::Assembler::psra, \ 3358 &InstX86Base<Machine>::Traits::Assembler::psra, \
3210 &InstX86Base<Machine>::Traits::Assembler::psra}; \ 3359 &InstX86Base<Machine>::Traits::Assembler::psra}; \
3211 template <> \ 3360 template <> \
3212 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterShiftOp \ 3361 const InstX86Base<Machine>::Traits::Assembler::XmmEmitterShiftOp \
3213 InstX86Psrl<Machine>::Base::Emitter = { \ 3362 InstX86Psrl<Machine>::Base::Emitter = { \
3214 &InstX86Base<Machine>::Traits::Assembler::psrl, \ 3363 &InstX86Base<Machine>::Traits::Assembler::psrl, \
3215 &InstX86Base<Machine>::Traits::Assembler::psrl, \ 3364 &InstX86Base<Machine>::Traits::Assembler::psrl, \
3216 &InstX86Base<Machine>::Traits::Assembler::psrl}; \ 3365 &InstX86Base<Machine>::Traits::Assembler::psrl}; \
3217 } \ 3366 } \
3218 } 3367 }
3219 3368
3220 } // end of namespace X86Internal 3369 } // end of namespace X86Internal
3221 } // end of namespace Ice 3370 } // end of namespace Ice
3222 3371
3223 #include "IceInstX86BaseImpl.h" 3372 #include "IceInstX86BaseImpl.h"
3224 3373
3225 #endif // SUBZERO_SRC_ICEINSTX86BASE_H 3374 #endif // SUBZERO_SRC_ICEINSTX86BASE_H
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