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Side by Side Diff: src/IceAssemblerX86BaseImpl.h

Issue 1497033002: Fuse icmp/fcmp with select (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes. Created 5 years ago
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1 //===- subzero/src/IceAssemblerX86BaseImpl.h - base x86 assembler -*- C++ -*-=// 1 //===- subzero/src/IceAssemblerX86BaseImpl.h - base x86 assembler -*- C++ -*-=//
2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
3 // for details. All rights reserved. Use of this source code is governed by a 3 // for details. All rights reserved. Use of this source code is governed by a
4 // BSD-style license that can be found in the LICENSE file. 4 // BSD-style license that can be found in the LICENSE file.
5 // 5 //
6 // Modified by the Subzero authors. 6 // Modified by the Subzero authors.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // The Subzero Code Generator 10 // The Subzero Code Generator
(...skipping 1143 matching lines...) Expand 10 before | Expand all | Expand 10 after
1154 typename Traits::XmmRegister dst, 1154 typename Traits::XmmRegister dst,
1155 const typename Traits::Address &src) { 1155 const typename Traits::Address &src) {
1156 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1156 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1157 emitRex(RexTypeIrrelevant, src, dst); 1157 emitRex(RexTypeIrrelevant, src, dst);
1158 emitUint8(0x0F); 1158 emitUint8(0x0F);
1159 emitUint8(0x59); 1159 emitUint8(0x59);
1160 emitOperand(gprEncoding(dst), src); 1160 emitOperand(gprEncoding(dst), src);
1161 } 1161 }
1162 1162
1163 template <class Machine> 1163 template <class Machine>
1164 void AssemblerX86Base<Machine>::minps(typename Traits::XmmRegister dst, 1164 void AssemblerX86Base<Machine>::minps(Type Ty, typename Traits::XmmRegister dst,
1165 typename Traits::XmmRegister src) { 1165 typename Traits::XmmRegister src) {
1166 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1166 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1167 if (!isFloat32Asserting32Or64(Ty))
1168 emitUint8(0x66);
1167 emitRexRB(RexTypeIrrelevant, dst, src); 1169 emitRexRB(RexTypeIrrelevant, dst, src);
1168 emitUint8(0x0F); 1170 emitUint8(0x0F);
1169 emitUint8(0x5D); 1171 emitUint8(0x5D);
1172 emitXmmRegisterOperand(dst, src);
1173 }
1174
1175 template <class Machine>
1176 void AssemblerX86Base<Machine>::minps(Type Ty, typename Traits::XmmRegister dst,
1177 const typename Traits::Address &src) {
1178 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1179 if (!isFloat32Asserting32Or64(Ty))
1180 emitUint8(0x66);
1181 emitRex(RexTypeIrrelevant, src, dst);
1182 emitUint8(0x0F);
1183 emitUint8(0x5D);
1184 emitOperand(gprEncoding(dst), src);
1185 }
1186
1187 template <class Machine>
1188 void AssemblerX86Base<Machine>::minss(Type Ty, typename Traits::XmmRegister dst,
1189 typename Traits::XmmRegister src) {
1190 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1191 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1192 emitRexRB(RexTypeIrrelevant, dst, src);
1193 emitUint8(0x0F);
1194 emitUint8(0x5D);
1170 emitXmmRegisterOperand(dst, src); 1195 emitXmmRegisterOperand(dst, src);
1171 } 1196 }
1172 1197
1173 template <class Machine> 1198 template <class Machine>
1174 void AssemblerX86Base<Machine>::maxps(typename Traits::XmmRegister dst, 1199 void AssemblerX86Base<Machine>::minss(Type Ty, typename Traits::XmmRegister dst,
1200 const typename Traits::Address &src) {
1201 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1202 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1203 emitRex(RexTypeIrrelevant, src, dst);
1204 emitUint8(0x0F);
1205 emitUint8(0x5D);
1206 emitOperand(gprEncoding(dst), src);
1207 }
1208
1209 template <class Machine>
1210 void AssemblerX86Base<Machine>::maxps(Type Ty, typename Traits::XmmRegister dst,
1175 typename Traits::XmmRegister src) { 1211 typename Traits::XmmRegister src) {
1176 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1212 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1213 if (!isFloat32Asserting32Or64(Ty))
1214 emitUint8(0x66);
1177 emitRexRB(RexTypeIrrelevant, dst, src); 1215 emitRexRB(RexTypeIrrelevant, dst, src);
1178 emitUint8(0x0F); 1216 emitUint8(0x0F);
1179 emitUint8(0x5F); 1217 emitUint8(0x5F);
1218 emitXmmRegisterOperand(dst, src);
1219 }
1220
1221 template <class Machine>
1222 void AssemblerX86Base<Machine>::maxps(Type Ty, typename Traits::XmmRegister dst,
1223 const typename Traits::Address &src) {
1224 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1225 if (!isFloat32Asserting32Or64(Ty))
1226 emitUint8(0x66);
1227 emitRex(RexTypeIrrelevant, src, dst);
1228 emitUint8(0x0F);
1229 emitUint8(0x5F);
1230 emitOperand(gprEncoding(dst), src);
1231 }
1232
1233 template <class Machine>
1234 void AssemblerX86Base<Machine>::maxss(Type Ty, typename Traits::XmmRegister dst,
1235 typename Traits::XmmRegister src) {
1236 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1237 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1238 emitRexRB(RexTypeIrrelevant, dst, src);
1239 emitUint8(0x0F);
1240 emitUint8(0x5F);
1180 emitXmmRegisterOperand(dst, src); 1241 emitXmmRegisterOperand(dst, src);
1181 } 1242 }
1182 1243
1183 template <class Machine> 1244 template <class Machine>
1184 void AssemblerX86Base<Machine>::andps(typename Traits::XmmRegister dst, 1245 void AssemblerX86Base<Machine>::maxss(Type Ty, typename Traits::XmmRegister dst,
1246 const typename Traits::Address &src) {
1247 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1248 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1249 emitRex(RexTypeIrrelevant, src, dst);
1250 emitUint8(0x0F);
1251 emitUint8(0x5F);
1252 emitOperand(gprEncoding(dst), src);
1253 }
1254
1255 template <class Machine>
1256 void AssemblerX86Base<Machine>::andnps(Type Ty,
1257 typename Traits::XmmRegister dst,
1258 typename Traits::XmmRegister src) {
1259 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1260 if (!isFloat32Asserting32Or64(Ty))
1261 emitUint8(0x66);
1262 emitRexRB(RexTypeIrrelevant, dst, src);
1263 emitUint8(0x0F);
1264 emitUint8(0x55);
1265 emitXmmRegisterOperand(dst, src);
1266 }
1267
1268 template <class Machine>
1269 void AssemblerX86Base<Machine>::andnps(Type Ty,
1270 typename Traits::XmmRegister dst,
1271 const typename Traits::Address &src) {
1272 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1273 if (!isFloat32Asserting32Or64(Ty))
1274 emitUint8(0x66);
1275 emitRex(RexTypeIrrelevant, src, dst);
1276 emitUint8(0x0F);
1277 emitUint8(0x55);
1278 emitOperand(gprEncoding(dst), src);
1279 }
1280
1281 template <class Machine>
1282 void AssemblerX86Base<Machine>::andps(Type Ty, typename Traits::XmmRegister dst,
1185 typename Traits::XmmRegister src) { 1283 typename Traits::XmmRegister src) {
1186 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1284 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1285 if (!isFloat32Asserting32Or64(Ty))
1286 emitUint8(0x66);
1187 emitRexRB(RexTypeIrrelevant, dst, src); 1287 emitRexRB(RexTypeIrrelevant, dst, src);
1188 emitUint8(0x0F); 1288 emitUint8(0x0F);
1189 emitUint8(0x54); 1289 emitUint8(0x54);
1190 emitXmmRegisterOperand(dst, src); 1290 emitXmmRegisterOperand(dst, src);
1191 } 1291 }
1192 1292
1193 template <class Machine> 1293 template <class Machine>
1194 void AssemblerX86Base<Machine>::andps(typename Traits::XmmRegister dst, 1294 void AssemblerX86Base<Machine>::andps(Type Ty, typename Traits::XmmRegister dst,
1195 const typename Traits::Address &src) { 1295 const typename Traits::Address &src) {
1196 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1296 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1297 if (!isFloat32Asserting32Or64(Ty))
1298 emitUint8(0x66);
1197 emitRex(RexTypeIrrelevant, src, dst); 1299 emitRex(RexTypeIrrelevant, src, dst);
1198 emitUint8(0x0F); 1300 emitUint8(0x0F);
1199 emitUint8(0x54); 1301 emitUint8(0x54);
1200 emitOperand(gprEncoding(dst), src); 1302 emitOperand(gprEncoding(dst), src);
1201 } 1303 }
1202 1304
1203 template <class Machine> 1305 template <class Machine>
1204 void AssemblerX86Base<Machine>::orps(typename Traits::XmmRegister dst, 1306 void AssemblerX86Base<Machine>::orps(Type Ty, typename Traits::XmmRegister dst,
1205 typename Traits::XmmRegister src) { 1307 typename Traits::XmmRegister src) {
1206 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1308 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1309 if (!isFloat32Asserting32Or64(Ty))
1310 emitUint8(0x66);
1207 emitRexRB(RexTypeIrrelevant, dst, src); 1311 emitRexRB(RexTypeIrrelevant, dst, src);
1208 emitUint8(0x0F); 1312 emitUint8(0x0F);
1209 emitUint8(0x56); 1313 emitUint8(0x56);
1210 emitXmmRegisterOperand(dst, src); 1314 emitXmmRegisterOperand(dst, src);
1211 } 1315 }
1212 1316
1213 template <class Machine> 1317 template <class Machine>
1318 void AssemblerX86Base<Machine>::orps(Type Ty, typename Traits::XmmRegister dst,
1319 const typename Traits::Address &src) {
1320 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1321 if (!isFloat32Asserting32Or64(Ty))
1322 emitUint8(0x66);
1323 emitRex(RexTypeIrrelevant, src, dst);
1324 emitUint8(0x0F);
1325 emitUint8(0x56);
1326 emitOperand(gprEncoding(dst), src);
1327 }
1328
1329 template <class Machine>
1214 void AssemblerX86Base<Machine>::blendvps(Type /* Ty */, 1330 void AssemblerX86Base<Machine>::blendvps(Type /* Ty */,
1215 typename Traits::XmmRegister dst, 1331 typename Traits::XmmRegister dst,
1216 typename Traits::XmmRegister src) { 1332 typename Traits::XmmRegister src) {
1217 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1333 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1218 emitUint8(0x66); 1334 emitUint8(0x66);
1219 emitRexRB(RexTypeIrrelevant, dst, src); 1335 emitRexRB(RexTypeIrrelevant, dst, src);
1220 emitUint8(0x0F); 1336 emitUint8(0x0F);
1221 emitUint8(0x38); 1337 emitUint8(0x38);
1222 emitUint8(0x14); 1338 emitUint8(0x14);
1223 emitXmmRegisterOperand(dst, src); 1339 emitXmmRegisterOperand(dst, src);
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
1257 emitUint8(0x66); 1373 emitUint8(0x66);
1258 emitRex(RexTypeIrrelevant, src, dst); 1374 emitRex(RexTypeIrrelevant, src, dst);
1259 emitUint8(0x0F); 1375 emitUint8(0x0F);
1260 emitUint8(0x38); 1376 emitUint8(0x38);
1261 emitUint8(0x10); 1377 emitUint8(0x10);
1262 emitOperand(gprEncoding(dst), src); 1378 emitOperand(gprEncoding(dst), src);
1263 } 1379 }
1264 1380
1265 template <class Machine> 1381 template <class Machine>
1266 void AssemblerX86Base<Machine>::cmpps( 1382 void AssemblerX86Base<Machine>::cmpps(
1267 typename Traits::XmmRegister dst, typename Traits::XmmRegister src, 1383 Type Ty, typename Traits::XmmRegister dst, typename Traits::XmmRegister src,
1268 typename Traits::Cond::CmppsCond CmpCondition) { 1384 typename Traits::Cond::CmppsCond CmpCondition) {
1269 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1385 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1386 if (Ty == IceType_f64)
1387 emitUint8(0x66);
1270 emitRexRB(RexTypeIrrelevant, dst, src); 1388 emitRexRB(RexTypeIrrelevant, dst, src);
1271 emitUint8(0x0F); 1389 emitUint8(0x0F);
1272 emitUint8(0xC2); 1390 emitUint8(0xC2);
1273 emitXmmRegisterOperand(dst, src); 1391 emitXmmRegisterOperand(dst, src);
1274 emitUint8(CmpCondition); 1392 emitUint8(CmpCondition);
1275 } 1393 }
1276 1394
1277 template <class Machine> 1395 template <class Machine>
1278 void AssemblerX86Base<Machine>::cmpps( 1396 void AssemblerX86Base<Machine>::cmpps(
1279 typename Traits::XmmRegister dst, const typename Traits::Address &src, 1397 Type Ty, typename Traits::XmmRegister dst,
1398 const typename Traits::Address &src,
1280 typename Traits::Cond::CmppsCond CmpCondition) { 1399 typename Traits::Cond::CmppsCond CmpCondition) {
1281 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1400 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1401 if (Ty == IceType_f64)
1402 emitUint8(0x66);
1282 emitRex(RexTypeIrrelevant, src, dst); 1403 emitRex(RexTypeIrrelevant, src, dst);
1283 emitUint8(0x0F); 1404 emitUint8(0x0F);
1284 emitUint8(0xC2); 1405 emitUint8(0xC2);
1285 emitOperand(gprEncoding(dst), src); 1406 emitOperand(gprEncoding(dst), src);
1286 emitUint8(CmpCondition); 1407 emitUint8(CmpCondition);
1287 } 1408 }
1288 1409
1289 template <class Machine> 1410 template <class Machine>
1290 void AssemblerX86Base<Machine>::sqrtps(typename Traits::XmmRegister dst) { 1411 void AssemblerX86Base<Machine>::sqrtps(typename Traits::XmmRegister dst) {
1291 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1412 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
(...skipping 147 matching lines...) Expand 10 before | Expand all | Expand 10 after
1439 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1560 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1440 emitRex(RexTypeIrrelevant, src, dst); 1561 emitRex(RexTypeIrrelevant, src, dst);
1441 emitUint8(0x0F); 1562 emitUint8(0x0F);
1442 emitUint8(0xC6); 1563 emitUint8(0xC6);
1443 emitOperand(gprEncoding(dst), src); 1564 emitOperand(gprEncoding(dst), src);
1444 assert(imm.is_uint8()); 1565 assert(imm.is_uint8());
1445 emitUint8(imm.value()); 1566 emitUint8(imm.value());
1446 } 1567 }
1447 1568
1448 template <class Machine> 1569 template <class Machine>
1449 void AssemblerX86Base<Machine>::minpd(typename Traits::XmmRegister dst,
1450 typename Traits::XmmRegister src) {
1451 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1452 emitUint8(0x66);
1453 emitRexRB(RexTypeIrrelevant, dst, src);
1454 emitUint8(0x0F);
1455 emitUint8(0x5D);
1456 emitXmmRegisterOperand(dst, src);
1457 }
1458
1459 template <class Machine>
1460 void AssemblerX86Base<Machine>::maxpd(typename Traits::XmmRegister dst,
1461 typename Traits::XmmRegister src) {
1462 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1463 emitUint8(0x66);
1464 emitRexRB(RexTypeIrrelevant, dst, src);
1465 emitUint8(0x0F);
1466 emitUint8(0x5F);
1467 emitXmmRegisterOperand(dst, src);
1468 }
1469
1470 template <class Machine>
1471 void AssemblerX86Base<Machine>::sqrtpd(typename Traits::XmmRegister dst) { 1570 void AssemblerX86Base<Machine>::sqrtpd(typename Traits::XmmRegister dst) {
1472 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1571 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1473 emitUint8(0x66); 1572 emitUint8(0x66);
1474 emitRexRB(RexTypeIrrelevant, dst, dst); 1573 emitRexRB(RexTypeIrrelevant, dst, dst);
1475 emitUint8(0x0F); 1574 emitUint8(0x0F);
1476 emitUint8(0x51); 1575 emitUint8(0x51);
1477 emitXmmRegisterOperand(dst, dst); 1576 emitXmmRegisterOperand(dst, dst);
1478 } 1577 }
1479 1578
1480 template <class Machine> 1579 template <class Machine>
(...skipping 182 matching lines...) Expand 10 before | Expand all | Expand 10 after
1663 typename Traits::XmmRegister src) { 1762 typename Traits::XmmRegister src) {
1664 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1763 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1665 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2); 1764 emitUint8(isFloat32Asserting32Or64(Ty) ? 0xF3 : 0xF2);
1666 emitRexRB(RexTypeIrrelevant, dst, src); 1765 emitRexRB(RexTypeIrrelevant, dst, src);
1667 emitUint8(0x0F); 1766 emitUint8(0x0F);
1668 emitUint8(0x51); 1767 emitUint8(0x51);
1669 emitXmmRegisterOperand(dst, src); 1768 emitXmmRegisterOperand(dst, src);
1670 } 1769 }
1671 1770
1672 template <class Machine> 1771 template <class Machine>
1673 void AssemblerX86Base<Machine>::xorpd(typename Traits::XmmRegister dst, 1772 void AssemblerX86Base<Machine>::xorps(Type Ty, typename Traits::XmmRegister dst,
1674 const typename Traits::Address &src) { 1773 const typename Traits::Address &src) {
1675 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1774 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1676 emitUint8(0x66); 1775 if (!isFloat32Asserting32Or64(Ty))
1776 emitUint8(0x66);
1677 emitRex(RexTypeIrrelevant, src, dst); 1777 emitRex(RexTypeIrrelevant, src, dst);
1678 emitUint8(0x0F); 1778 emitUint8(0x0F);
1679 emitUint8(0x57); 1779 emitUint8(0x57);
1680 emitOperand(gprEncoding(dst), src);
1681 }
1682
1683 template <class Machine>
1684 void AssemblerX86Base<Machine>::xorpd(typename Traits::XmmRegister dst,
1685 typename Traits::XmmRegister src) {
1686 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1687 emitUint8(0x66);
1688 emitRexRB(RexTypeIrrelevant, dst, src);
1689 emitUint8(0x0F);
1690 emitUint8(0x57);
1691 emitXmmRegisterOperand(dst, src);
1692 }
1693
1694 template <class Machine>
1695 void AssemblerX86Base<Machine>::orpd(typename Traits::XmmRegister dst,
1696 typename Traits::XmmRegister src) {
1697 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1698 emitUint8(0x66);
1699 emitRexRB(RexTypeIrrelevant, dst, src);
1700 emitUint8(0x0F);
1701 emitUint8(0x56);
1702 emitXmmRegisterOperand(dst, src);
1703 }
1704
1705 template <class Machine>
1706 void AssemblerX86Base<Machine>::xorps(typename Traits::XmmRegister dst,
1707 const typename Traits::Address &src) {
1708 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1709 emitRex(RexTypeIrrelevant, src, dst);
1710 emitUint8(0x0F);
1711 emitUint8(0x57);
1712 emitOperand(gprEncoding(dst), src); 1780 emitOperand(gprEncoding(dst), src);
1713 } 1781 }
1714 1782
1715 template <class Machine> 1783 template <class Machine>
1716 void AssemblerX86Base<Machine>::xorps(typename Traits::XmmRegister dst, 1784 void AssemblerX86Base<Machine>::xorps(Type Ty, typename Traits::XmmRegister dst,
1717 typename Traits::XmmRegister src) { 1785 typename Traits::XmmRegister src) {
1718 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1786 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1787 if (!isFloat32Asserting32Or64(Ty))
1788 emitUint8(0x66);
1719 emitRexRB(RexTypeIrrelevant, dst, src); 1789 emitRexRB(RexTypeIrrelevant, dst, src);
1720 emitUint8(0x0F); 1790 emitUint8(0x0F);
1721 emitUint8(0x57); 1791 emitUint8(0x57);
1722 emitXmmRegisterOperand(dst, src); 1792 emitXmmRegisterOperand(dst, src);
1723 } 1793 }
1724 1794
1725 template <class Machine> 1795 template <class Machine>
1726 void AssemblerX86Base<Machine>::andpd(typename Traits::XmmRegister dst,
1727 const typename Traits::Address &src) {
1728 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1729 emitUint8(0x66);
1730 emitRex(RexTypeIrrelevant, src, dst);
1731 emitUint8(0x0F);
1732 emitUint8(0x54);
1733 emitOperand(gprEncoding(dst), src);
1734 }
1735
1736 template <class Machine>
1737 void AssemblerX86Base<Machine>::andpd(typename Traits::XmmRegister dst,
1738 typename Traits::XmmRegister src) {
1739 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1740 emitUint8(0x66);
1741 emitRexRB(RexTypeIrrelevant, dst, src);
1742 emitUint8(0x0F);
1743 emitUint8(0x54);
1744 emitXmmRegisterOperand(dst, src);
1745 }
1746
1747 template <class Machine>
1748 void AssemblerX86Base<Machine>::insertps(Type Ty, 1796 void AssemblerX86Base<Machine>::insertps(Type Ty,
1749 typename Traits::XmmRegister dst, 1797 typename Traits::XmmRegister dst,
1750 typename Traits::XmmRegister src, 1798 typename Traits::XmmRegister src,
1751 const Immediate &imm) { 1799 const Immediate &imm) {
1752 AssemblerBuffer::EnsureCapacity ensured(&Buffer); 1800 AssemblerBuffer::EnsureCapacity ensured(&Buffer);
1753 assert(imm.is_uint8()); 1801 assert(imm.is_uint8());
1754 assert(isVectorFloatingType(Ty)); 1802 assert(isVectorFloatingType(Ty));
1755 (void)Ty; 1803 (void)Ty;
1756 emitUint8(0x66); 1804 emitUint8(0x66);
1757 emitRexRB(RexTypeIrrelevant, dst, src); 1805 emitRexRB(RexTypeIrrelevant, dst, src);
(...skipping 1687 matching lines...) Expand 10 before | Expand all | Expand 10 after
3445 (void)shifter; 3493 (void)shifter;
3446 if (Ty == IceType_i16) 3494 if (Ty == IceType_i16)
3447 emitOperandSizeOverride(); 3495 emitOperandSizeOverride();
3448 emitRexB(Ty, operand.rm()); 3496 emitRexB(Ty, operand.rm());
3449 emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); 3497 emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
3450 emitOperand(rm, operand); 3498 emitOperand(rm, operand);
3451 } 3499 }
3452 3500
3453 } // end of namespace X86Internal 3501 } // end of namespace X86Internal
3454 } // end of namespace Ice 3502 } // end of namespace Ice
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