Fuse icmp/fcmp with select

src/IceInstX86BaseImpl.h

 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1087 matching lines @@
     return;
   char buf[30];
   snprintf(
       buf, llvm::array_lengthof(buf), "mul%s",
       InstX86Base<Machine>::Traits::TypeAttributes[this->getDest()->getType()]
           .SdSsString);
   this->emitTwoAddress(buf, this, Func);
 }
 
 template <class Machine>
+void InstX86Andnps<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+
+  char buf[30];

[Jim Stichnoth, 2015/12/08 18:55:59]

This style of generating the opcode string bothers me for a few reasons:

1. It's similar to above but doesn't use TypeAttributes[].

2. It ignores the class's Opcode static field (where the "andnp" could
conceivably come from).

3. The string could just be something like  (this->getDest()->getType() ==
IceType_f64) ? "andnpd" : "andnps"  without all the buf[] machinery.

I would probably improve this, and existing emit() implementations, by changing
the sdss column of ICETYPEX8632_TABLE and ICETYPEX8664_TABLE to be just "s" and
"d", then change the various FP scalar Opcode strings to append the "s", then
use the Opcode plus the TypeAttributes[] to form the emit string.

If that doesn't make sense, I can mock up the change to demonstrate.

[sehr, 2015/12/15 20:45:44]

OK, I think there's a larger commonality to the SSE[2] opcodes here, and we need
a common base class for them.  I  have an idea how to address this more
generally, but would like to consult with you and John before undertaking it. 
As this CL is already getting way out of control, I've fallen back to addressing
your (1).  PTAL.

+  const char *suffix = (this->getDest()->getType() == IceType_f64) ? "d" : "s";
+  snprintf(buf, llvm::array_lengthof(buf), "andnp%s", suffix);
+  this->emitTwoAddress(buf, this, Func);
+}
+
+template <class Machine>
+void InstX86Andps<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+
+  char buf[30];
+  const char *suffix = (this->getDest()->getType() == IceType_f64) ? "d" : "s";
+  snprintf(buf, llvm::array_lengthof(buf), "andp%s", suffix);
+  this->emitTwoAddress(buf, this, Func);
+}
+
+template <class Machine>
+void InstX86Maxss<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+
+  char buf[30];
+  const char *suffix = (this->getDest()->getType() == IceType_f64) ? "d" : "s";
+  snprintf(buf, llvm::array_lengthof(buf), "maxs%s", suffix);
+  this->emitTwoAddress(buf, this, Func);
+}
+
+template <class Machine>
+void InstX86Minss<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+
+  char buf[30];
+  const char *suffix = (this->getDest()->getType() == IceType_f64) ? "d" : "s";
+  snprintf(buf, llvm::array_lengthof(buf), "mins%s", suffix);
+  this->emitTwoAddress(buf, this, Func);
+}
+
+template <class Machine>
+void InstX86Orps<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+
+  char buf[30];
+  const char *suffix = (this->getDest()->getType() == IceType_f64) ? "d" : "s";
+  snprintf(buf, llvm::array_lengthof(buf), "orp%s", suffix);
+  this->emitTwoAddress(buf, this, Func);
+}
+
+template <class Machine>
+void InstX86Xorps<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+
+  char buf[30];
+  const char *suffix = (this->getDest()->getType() == IceType_f64) ? "d" : "s";
+  snprintf(buf, llvm::array_lengthof(buf), "xorp%s", suffix);
+  this->emitTwoAddress(buf, this, Func);
+}
+
+template <class Machine>
 void InstX86Pmuludq<Machine>::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   assert(this->getSrc(0)->getType() == IceType_v4i32 &&
          this->getSrc(1)->getType() == IceType_v4i32);
   this->emitTwoAddress(this->Opcode, this, Func);
 }
 
 template <class Machine>
 void InstX86Divss<Machine>::emit(const Cfg *Func) const {
@@ skipping 502 matching lines @@
 template <class Machine>
 void InstX86Cmpps<Machine>::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(this->getSrcSize() == 2);
   assert(Condition < InstX86Base<Machine>::Traits::Cond::Cmpps_Invalid);
   Str << "\t";
   Str << "cmp"
       << InstX86Base<Machine>::Traits::InstCmppsAttributes[Condition].EmitString
-      << "ps"
+      << "p" << ((this->getDest()->getType() == IceType_f64) ? "d" : "s")
       << "\t";
   this->getSrc(1)->emit(Func);
   Str << ", ";
   this->getDest()->emit(Func);
 }
 
 template <class Machine>
 void InstX86Cmpps<Machine>::emitIAS(const Cfg *Func) const {
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   assert(this->getSrcSize() == 2);
   assert(Condition < InstX86Base<Machine>::Traits::Cond::Cmpps_Invalid);
   // Assuming there isn't any load folding for cmpps, and vector constants are
   // not allowed in PNaCl.
   assert(llvm::isa<Variable>(this->getSrc(1)));
   auto *Target = InstX86Base<Machine>::getTarget(Func);
   const auto *SrcVar = llvm::cast<Variable>(this->getSrc(1));
   if (SrcVar->hasReg()) {
-    Asm->cmpps(InstX86Base<Machine>::Traits::getEncodedXmm(
+    Asm->cmpps(this->getDest()->getType(),
+               InstX86Base<Machine>::Traits::getEncodedXmm(
                    this->getDest()->getRegNum()),
                InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()),
                Condition);
   } else {
     typename InstX86Base<Machine>::Traits::Address SrcStackAddr =
         Target->stackVarToAsmOperand(SrcVar);
-    Asm->cmpps(InstX86Base<Machine>::Traits::getEncodedXmm(
+    Asm->cmpps(this->getDest()->getType(),
+               InstX86Base<Machine>::Traits::getEncodedXmm(
                    this->getDest()->getRegNum()),
                SrcStackAddr, Condition);
   }
 }
 
 template <class Machine>
 void InstX86Cmpps<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
@@ skipping 1519 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "IACA_END";
 }
 
 } // end of namespace X86Internal
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H