Index: runtime/vm/assembler_x64.cc |
diff --git a/runtime/vm/assembler_x64.cc b/runtime/vm/assembler_x64.cc |
index b3a1d09638ab931f579d0e3dfe5dd4fab5d1d95a..9c4b45da8b44ad2ca12c72cab97e38fa69e36e34 100644 |
--- a/runtime/vm/assembler_x64.cc |
+++ b/runtime/vm/assembler_x64.cc |
@@ -785,29 +785,57 @@ void Assembler::orps(XmmRegister dst, XmmRegister src) { |
} |
void Assembler::notps(XmmRegister dst) { |
- // { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; |
- movq(TMP, Address(THR, Thread::float_not_address_offset())); |
+ static const struct ALIGN16 { |
+ uint32_t a; |
+ uint32_t b; |
+ uint32_t c; |
+ uint32_t d; |
+ } float_not_constant = |
+ { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&float_not_constant))); |
xorps(dst, Address(TMP, 0)); |
} |
void Assembler::negateps(XmmRegister dst) { |
- // { 0x80000000, 0x80000000, 0x80000000, 0x80000000 } |
- movq(TMP, Address(THR, Thread::float_negate_address_offset())); |
+ static const struct ALIGN16 { |
+ uint32_t a; |
+ uint32_t b; |
+ uint32_t c; |
+ uint32_t d; |
+ } float_negate_constant = |
+ { 0x80000000, 0x80000000, 0x80000000, 0x80000000 }; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&float_negate_constant))); |
xorps(dst, Address(TMP, 0)); |
} |
void Assembler::absps(XmmRegister dst) { |
- // { 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF } |
- movq(TMP, Address(THR, Thread::float_absolute_address_offset())); |
+ static const struct ALIGN16 { |
+ uint32_t a; |
+ uint32_t b; |
+ uint32_t c; |
+ uint32_t d; |
+ } float_absolute_constant = |
+ { 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF }; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&float_absolute_constant))); |
andps(dst, Address(TMP, 0)); |
} |
void Assembler::zerowps(XmmRegister dst) { |
- // { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 } |
- movq(TMP, Address(THR, Thread::float_zerow_address_offset())); |
+ static const struct ALIGN16 { |
+ uint32_t a; |
+ uint32_t b; |
+ uint32_t c; |
+ uint32_t d; |
+ } float_zerow_constant = |
+ { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 }; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&float_zerow_constant))); |
andps(dst, Address(TMP, 0)); |
} |
@@ -989,8 +1017,13 @@ void Assembler::addpd(XmmRegister dst, XmmRegister src) { |
void Assembler::negatepd(XmmRegister dst) { |
- // { 0x8000000000000000LL, 0x8000000000000000LL } |
- movq(TMP, Address(THR, Thread::double_negate_address_offset())); |
+ static const struct ALIGN16 { |
+ uint64_t a; |
+ uint64_t b; |
+ } double_negate_constant = |
+ { 0x8000000000000000LL, 0x8000000000000000LL }; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&double_negate_constant))); |
xorpd(dst, Address(TMP, 0)); |
} |
@@ -1032,8 +1065,13 @@ void Assembler::divpd(XmmRegister dst, XmmRegister src) { |
void Assembler::abspd(XmmRegister dst) { |
- // { 0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL } |
- movq(TMP, Address(THR, Thread::double_abs_address_offset())); |
+ static const struct ALIGN16 { |
+ uint64_t a; |
+ uint64_t b; |
+ } double_absolute_const = |
+ { 0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL }; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&double_absolute_const))); |
andpd(dst, Address(TMP, 0)); |
} |
@@ -3122,15 +3160,25 @@ void Assembler::IncrementSmiField(const Address& dest, int64_t increment) { |
void Assembler::DoubleNegate(XmmRegister d) { |
- // {0x8000000000000000LL, 0x8000000000000000LL} |
- movq(TMP, Address(THR, Thread::double_negate_address_offset())); |
+ static const struct ALIGN16 { |
+ uint64_t a; |
+ uint64_t b; |
+ } double_negate_constant = |
+ {0x8000000000000000LL, 0x8000000000000000LL}; |
+ LoadImmediate( |
+ TMP, Immediate(reinterpret_cast<intptr_t>(&double_negate_constant))); |
xorpd(d, Address(TMP, 0)); |
} |
void Assembler::DoubleAbs(XmmRegister reg) { |
- // {0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL} |
- movq(TMP, Address(THR, Thread::double_abs_address_offset())); |
+ static const struct ALIGN16 { |
+ uint64_t a; |
+ uint64_t b; |
+ } double_abs_constant = |
+ {0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL}; |
+ LoadImmediate(TMP, |
+ Immediate(reinterpret_cast<intptr_t>(&double_abs_constant))); |
andpd(reg, Address(TMP, 0)); |
} |