Revert "Precompilation/x64: Load float vector constants via Thread."

runtime/vm/assembler_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/heap.h"
@@ skipping 767 matching lines @@
 
 void Assembler::orps(XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitREX_RB(dst, src);
   EmitUint8(0x0F);
   EmitUint8(0x56);
   EmitXmmRegisterOperand(dst & 7, src);
 }
 
 void Assembler::notps(XmmRegister dst) {
-  // { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF };
-  movq(TMP, Address(THR, Thread::float_not_address_offset()));
+  static const struct ALIGN16 {
+    uint32_t a;
+    uint32_t b;
+    uint32_t c;
+    uint32_t d;
+  } float_not_constant =
+      { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF };
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&float_not_constant)));
   xorps(dst, Address(TMP, 0));
 }
 
 
 void Assembler::negateps(XmmRegister dst) {
-  // { 0x80000000, 0x80000000, 0x80000000, 0x80000000 }
-  movq(TMP, Address(THR, Thread::float_negate_address_offset()));
+  static const struct ALIGN16 {
+    uint32_t a;
+    uint32_t b;
+    uint32_t c;
+    uint32_t d;
+  } float_negate_constant =
+      { 0x80000000, 0x80000000, 0x80000000, 0x80000000 };
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&float_negate_constant)));
   xorps(dst, Address(TMP, 0));
 }
 
 
 void Assembler::absps(XmmRegister dst) {
-  // { 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF }
-  movq(TMP, Address(THR, Thread::float_absolute_address_offset()));
+  static const struct ALIGN16 {
+    uint32_t a;
+    uint32_t b;
+    uint32_t c;
+    uint32_t d;
+  } float_absolute_constant =
+      { 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF };
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&float_absolute_constant)));
   andps(dst, Address(TMP, 0));
 }
 
 
 void Assembler::zerowps(XmmRegister dst) {
-  // { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 }
-  movq(TMP, Address(THR, Thread::float_zerow_address_offset()));
+  static const struct ALIGN16 {
+    uint32_t a;
+    uint32_t b;
+    uint32_t c;
+    uint32_t d;
+  } float_zerow_constant =
+      { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 };
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&float_zerow_constant)));
   andps(dst, Address(TMP, 0));
 }
 
 
 void Assembler::cmppseq(XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitREX_RB(dst, src);
   EmitUint8(0x0F);
   EmitUint8(0xC2);
   EmitXmmRegisterOperand(dst & 7, src);
@@ skipping 161 matching lines @@
   ASSERT(dst <= XMM15);
   EmitUint8(0x66);
   EmitREX_RB(dst, src);
   EmitUint8(0x0F);
   EmitUint8(0x58);
   EmitXmmRegisterOperand(dst & 7, src);
 }
 
 
 void Assembler::negatepd(XmmRegister dst) {
-  // { 0x8000000000000000LL, 0x8000000000000000LL }
-  movq(TMP, Address(THR, Thread::double_negate_address_offset()));
+  static const struct ALIGN16 {
+    uint64_t a;
+    uint64_t b;
+  } double_negate_constant =
+      { 0x8000000000000000LL, 0x8000000000000000LL };
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&double_negate_constant)));
   xorpd(dst, Address(TMP, 0));
 }
 
 
 void Assembler::subpd(XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   ASSERT(src <= XMM15);
   ASSERT(dst <= XMM15);
   EmitUint8(0x66);
   EmitREX_RB(dst, src);
@@ skipping 21 matching lines @@
   ASSERT(dst <= XMM15);
   EmitUint8(0x66);
   EmitREX_RB(dst, src);
   EmitUint8(0x0F);
   EmitUint8(0x5E);
   EmitXmmRegisterOperand(dst & 7, src);
 }
 
 
 void Assembler::abspd(XmmRegister dst) {
-  // { 0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL }
-  movq(TMP, Address(THR, Thread::double_abs_address_offset()));
+  static const struct ALIGN16 {
+    uint64_t a;
+    uint64_t b;
+  } double_absolute_const =
+      { 0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL };
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&double_absolute_const)));
   andpd(dst, Address(TMP, 0));
 }
 
 
 void Assembler::minpd(XmmRegister dst, XmmRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   ASSERT(src <= XMM15);
   ASSERT(dst <= XMM15);
   EmitUint8(0x66);
   EmitREX_RB(dst, src);
@@ skipping 2068 matching lines @@
     Register temp = RCX;
     pushq(temp);
     leaq(temp, dest);
     addq(Address(temp, VerifiedMemory::offset()), inc_imm);
     popq(temp);
   }
 }
 
 
 void Assembler::DoubleNegate(XmmRegister d) {
-  // {0x8000000000000000LL, 0x8000000000000000LL}
-  movq(TMP, Address(THR, Thread::double_negate_address_offset()));
+  static const struct ALIGN16 {
+    uint64_t a;
+    uint64_t b;
+  } double_negate_constant =
+      {0x8000000000000000LL, 0x8000000000000000LL};
+  LoadImmediate(
+      TMP, Immediate(reinterpret_cast<intptr_t>(&double_negate_constant)));
   xorpd(d, Address(TMP, 0));
 }
 
 
 void Assembler::DoubleAbs(XmmRegister reg) {
-  // {0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL}
-  movq(TMP, Address(THR, Thread::double_abs_address_offset()));
+  static const struct ALIGN16 {
+    uint64_t a;
+    uint64_t b;
+  } double_abs_constant =
+      {0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL};
+  LoadImmediate(TMP,
+      Immediate(reinterpret_cast<intptr_t>(&double_abs_constant)));
   andpd(reg, Address(TMP, 0));
 }
 
 
 void Assembler::Stop(const char* message, bool fixed_length_encoding) {
   int64_t message_address = reinterpret_cast<int64_t>(message);
   if (FLAG_print_stop_message) {
     pushq(TMP);  // Preserve TMP register.
     pushq(RDI);  // Preserve RDI register.
     if (fixed_length_encoding) {
@@ skipping 771 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64