A64: Synchronize with r18084.

src/a64/assembler-a64-inl.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 546 matching lines @@
   }
 }
 
 
 void Assembler::deserialization_set_special_target_at(
     Address constant_pool_entry, Address target) {
   Memory::Address_at(constant_pool_entry) = target;
 }
 
 
-void Assembler::set_external_target_at(Address constant_pool_entry,
-                                       Address target) {
-  Memory::Address_at(constant_pool_entry) = target;
-}
-
-
 void Assembler::set_target_address_at(Address pc, Address target) {
   Memory::Address_at(target_pointer_address_at(pc)) = target;
   // Intuitively, we would think it is necessary to always flush the
   // instruction cache after patching a target address in the code as follows:
   //   CPU::FlushICache(pc, sizeof(target));
   // However, on ARM, an instruction is actually patched in the case of
   // embedded constants of the form:
   // ldr   ip, [pc, #...]
   // since the instruction accessing this address in the constant pool remains
   // unchanged, a flush is not required.
@@ skipping 561 matching lines @@
 
 
 void Assembler::ClearRecordedAstId() {
   recorded_ast_id_ = TypeFeedbackId::None();
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_A64_ASSEMBLER_A64_INL_H_