On MIPS, keeps Object::null() in a register.

runtime/vm/intermediate_language_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intermediate_language.h"
 
 #include "lib/error.h"
@@ skipping 84 matching lines @@
 
     __ BranchEqual(T2, fp_sp_dist, &stack_ok);
     __ break_(0);
 
     __ Bind(&stack_ok);
   }
 #endif
   // This sequence is patched by a debugger breakpoint. There is no need for
   // extra NOP instructions here because the sequence patched in for a
   // breakpoint is shorter than the sequence here.
-  __ LeaveDartFrame();
-  __ Ret();
+  __ LeaveDartFrameAndReturn();
   compiler->AddCurrentDescriptor(PcDescriptors::kReturn,
                                  Isolate::kNoDeoptId,
                                  token_pos());
 }
 
 
 bool IfThenElseInstr::IsSupported() {
   return false;
 }
 
@@ skipping 1123 matching lines @@
 
       LoadValueCid(compiler, value_cid_reg, value_reg);
 
       __ lw(TMP1, field_cid_operand);
       __ beq(value_cid_reg, TMP1, &ok);
       __ lw(TMP1, field_nullability_operand);
       __ subu(CMPRES, value_cid_reg, TMP1);
     } else if (value_cid == kNullCid) {
       // TODO(regis): TMP1 may conflict. Revisit.
       __ lw(TMP1, field_nullability_operand);
-      __ LoadImmediate(TMP2, value_cid);
-      __ subu(CMPRES, TMP1, TMP2);
+      __ LoadImmediate(CMPRES, value_cid);
+      __ subu(CMPRES, TMP1, CMPRES);
     } else {
       // TODO(regis): TMP1 may conflict. Revisit.
       __ lw(TMP1, field_cid_operand);
-      __ LoadImmediate(TMP2, value_cid);
-      __ subu(CMPRES, TMP1, TMP2);
+      __ LoadImmediate(CMPRES, value_cid);
+      __ subu(CMPRES, TMP1, CMPRES);
     }
     __ beq(CMPRES, ZR, &ok);
 
     __ lw(TMP1, field_cid_operand);
     __ BranchNotEqual(TMP1, kIllegalCid, fail);
 
     if (value_cid == kDynamicCid) {
       __ sw(value_cid_reg, field_cid_operand);
       __ sw(value_cid_reg, field_nullability_operand);
     } else {
@@ skipping 228 matching lines @@
     const intptr_t len = type_arguments().Length();
     if (type_arguments().IsRawInstantiatedRaw(len)) {
       __ BranchEqual(instantiator_reg,
                      reinterpret_cast<intptr_t>(Object::null()),
                      &type_arguments_instantiated);
     }
     // Instantiate non-null type arguments.
     // A runtime call to instantiate the type arguments is required.
     __ addiu(SP, SP, Immediate(-3 * kWordSize));
     __ LoadObject(TMP1, Object::ZoneHandle());
-    __ LoadObject(TMP2, type_arguments());
     __ sw(TMP1, Address(SP, 2 * kWordSize));  // Make room for the result.
-    __ sw(TMP2, Address(SP, 1 * kWordSize));
+    __ LoadObject(TMP1, type_arguments());
+    __ sw(TMP1, Address(SP, 1 * kWordSize));
     // Push instantiator type arguments.
     __ sw(instantiator_reg, Address(SP, 0 * kWordSize));
 
     compiler->GenerateCallRuntime(token_pos(),
                                   deopt_id(),
                                   kInstantiateTypeArgumentsRuntimeEntry,
                                   locs());
     // Pop instantiated type arguments.
     __ lw(result_reg, Address(SP, 2 * kWordSize));
     // Drop instantiator and uninstantiated type arguments.
@@ skipping 153 matching lines @@
 
   ASSERT(!exception_var().is_captured());
   ASSERT(!stacktrace_var().is_captured());
 
   __ sw(kExceptionObjectReg,
         Address(FP, exception_var().index() * kWordSize));
   __ sw(kStackTraceObjectReg,
         Address(FP, stacktrace_var().index() * kWordSize));
 
   Label next;
-  __ mov(TMP1, RA);  // Save return adress.
+  __ mov(T0, RA);  // Save return adress.
   // Restore the pool pointer.
   __ bal(&next);  // Branch and link to next instruction to get PC in RA.
-  __ delay_slot()->mov(TMP2, RA);  // Save PC of the following mov.
+  __ delay_slot()->mov(T1, RA);  // Save PC of the following mov.
 
   // Calculate offset of pool pointer from the PC.
   const intptr_t object_pool_pc_dist =
      Instructions::HeaderSize() - Instructions::object_pool_offset() +
      compiler->assembler()->CodeSize();
 
   __ Bind(&next);
-  __ mov(RA, TMP1);  // Restore return address.
-  __ lw(PP, Address(TMP2, -object_pool_pc_dist));
+  __ mov(RA, T0);  // Restore return address.
+  __ lw(PP, Address(T1, -object_pool_pc_dist));
 }
 
 
 LocationSummary* CheckStackOverflowInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 0;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs,
                           kNumTemps,
                           LocationSummary::kCallOnSlowPath);
@@ skipping 47 matching lines @@
   const intptr_t kNumInputs = 2;
   if (op_kind() == Token::kTRUNCDIV) {
     UNIMPLEMENTED();
     return NULL;
   } else {
     const intptr_t kNumTemps = 0;
     LocationSummary* summary =
         new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
     summary->set_in(0, Location::RequiresRegister());
     summary->set_in(1, Location::RegisterOrSmiConstant(right()));
+    if (op_kind() == Token::kADD) {
+      // Need an extra temp for the overflow detection code.
+      summary->set_temp(0, Location::RequiresRegister());
+    }
     // We make use of 3-operand instructions by not requiring result register
     // to be identical to first input register as on Intel.
     summary->set_out(Location::RequiresRegister());
     return summary;
   }
 }
 
 
 void BinarySmiOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   __ TraceSimMsg("BinarySmiOpInstr");
@@ skipping 21 matching lines @@
         } else {
           __ SubImmediateDetectOverflow(result, left, imm, CMPRES);
           __ bltz(CMPRES, deopt);
         }
         break;
       }
       case Token::kADD: {
         if (deopt == NULL) {
           __ AddImmediate(result, left, imm);
         } else {
-          __ AddImmediateDetectOverflow(result, left, imm, CMPRES);
+          Register temp = locs()->temp(0).reg();
+          __ AddImmediateDetectOverflow(result, left, imm, CMPRES, temp);
           __ bltz(CMPRES, deopt);
         }
         break;
       }
       case Token::kMUL: {
         // Keep left value tagged and untag right value.
         const intptr_t value = Smi::Cast(constant).Value();
         if (deopt == NULL) {
           if (value == 2) {
             __ sll(result, left, 1);
           } else {
             __ LoadImmediate(TMP1, value);
             __ mult(left, TMP1);
             __ mflo(result);
           }
         } else {
           if (value == 2) {
             __ sra(TMP1, left, 31);  // TMP1 = sign of left.
             __ sll(result, left, 1);
           } else {
             __ LoadImmediate(TMP1, value);
             __ mult(left, TMP1);
             __ mflo(result);
             __ mfhi(TMP1);
           }
-          __ sra(TMP2, result, 31);
-          __ bne(TMP1, TMP2, deopt);
+          __ sra(CMPRES, result, 31);
+          __ bne(TMP1, CMPRES, deopt);
         }
         break;
       }
       case Token::kTRUNCDIV: {
         UNIMPLEMENTED();
         break;
       }
       case Token::kBIT_AND: {
         // No overflow check.
         if (Utils::IsUint(kImmBits, imm)) {
@@ skipping 35 matching lines @@
     }
     return;
   }
 
   Register right = locs()->in(1).reg();
   switch (op_kind()) {
     case Token::kADD: {
       if (deopt == NULL) {
         __ addu(result, left, right);
       } else {
-        __ AdduDetectOverflow(result, left, right, CMPRES);
+        Register temp = locs()->temp(0).reg();
+        __ AdduDetectOverflow(result, left, right, CMPRES, temp);
         __ bltz(CMPRES, deopt);
       }
       break;
     }
     case Token::kSUB: {
       if (deopt == NULL) {
         __ subu(result, left, right);
       } else {
         __ SubuDetectOverflow(result, left, right, CMPRES);
         __ bltz(CMPRES, deopt);
@@ skipping 912 matching lines @@
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS