Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(321)

Side by Side Diff: runtime/vm/assembler_mips.cc

Issue 14854010: On MIPS, keeps Object::null() in a register. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « runtime/vm/assembler_mips.h ('k') | runtime/vm/assembler_mips_test.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/runtime_entry.h" 9 #include "vm/runtime_entry.h"
10 #include "vm/simulator.h" 10 #include "vm/simulator.h"
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after
74 addu(rd, rd, PP); 74 addu(rd, rd, PP);
75 lw(rd, Address(rd, offset_low)); 75 lw(rd, Address(rd, offset_low));
76 } else { 76 } else {
77 lw(rd, Address(PP, offset_low)); 77 lw(rd, Address(PP, offset_low));
78 } 78 }
79 } 79 }
80 } 80 }
81 81
82 82
83 void Assembler::AdduDetectOverflow(Register rd, Register rs, Register rt, 83 void Assembler::AdduDetectOverflow(Register rd, Register rs, Register rt,
84 Register ro) { 84 Register ro, Register scratch) {
85 ASSERT(rd != ro); 85 ASSERT(rd != ro);
86 ASSERT(rd != TMP1); 86 ASSERT(rd != TMP1);
87 ASSERT(ro != TMP1); 87 ASSERT(ro != TMP1);
88 ASSERT(ro != rs); 88 ASSERT(ro != rs);
89 ASSERT(ro != rt); 89 ASSERT(ro != rt);
90 90
91 if ((rs == rt) && (rd == rs)) { 91 if ((rs == rt) && (rd == rs)) {
92 ASSERT(rd != TMP2); 92 ASSERT(scratch != kNoRegister);
93 ASSERT(ro != TMP2); 93 ASSERT(scratch != TMP1);
94 ASSERT(rs != TMP2); 94 ASSERT(rd != scratch);
95 ASSERT(rt != TMP2); 95 ASSERT(ro != scratch);
96 mov(TMP2, rt); 96 ASSERT(rs != scratch);
97 rt = TMP2; 97 ASSERT(rt != scratch);
98 mov(scratch, rt);
99 rt = scratch;
98 } 100 }
99 101
100 if (rd == rs) { 102 if (rd == rs) {
101 mov(TMP1, rs); // Preserve rs. 103 mov(TMP1, rs); // Preserve rs.
102 addu(rd, rs, rt); // rs is overwritten. 104 addu(rd, rs, rt); // rs is overwritten.
103 xor_(TMP1, rd, TMP1); // Original rs. 105 xor_(TMP1, rd, TMP1); // Original rs.
104 xor_(ro, rd, rt); 106 xor_(ro, rd, rt);
105 and_(ro, ro, TMP1); 107 and_(ro, ro, TMP1);
106 } else if (rd == rt) { 108 } else if (rd == rt) {
107 mov(TMP1, rt); // Preserve rt. 109 mov(TMP1, rt); // Preserve rt.
(...skipping 121 matching lines...) Expand 10 before | Expand all | Expand 10 after
229 231
230 // Preserves object and value registers. 232 // Preserves object and value registers.
231 void Assembler::StoreIntoObjectFilter(Register object, 233 void Assembler::StoreIntoObjectFilter(Register object,
232 Register value, 234 Register value,
233 Label* no_update) { 235 Label* no_update) {
234 // For the value we are only interested in the new/old bit and the tag bit. 236 // For the value we are only interested in the new/old bit and the tag bit.
235 // And the new bit with the tag bit. The resulting bit will be 0 for a Smi. 237 // And the new bit with the tag bit. The resulting bit will be 0 for a Smi.
236 sll(TMP1, value, kObjectAlignmentLog2 - 1); 238 sll(TMP1, value, kObjectAlignmentLog2 - 1);
237 and_(TMP1, value, TMP1); 239 and_(TMP1, value, TMP1);
238 // And the result with the negated space bit of the object. 240 // And the result with the negated space bit of the object.
239 nor(TMP2, ZR, object); 241 nor(CMPRES, ZR, object);
240 and_(TMP1, TMP1, TMP2); 242 and_(TMP1, TMP1, CMPRES);
241 andi(TMP1, TMP1, Immediate(kNewObjectAlignmentOffset)); 243 andi(TMP1, TMP1, Immediate(kNewObjectAlignmentOffset));
242 beq(TMP1, ZR, no_update); 244 beq(TMP1, ZR, no_update);
243 } 245 }
244 246
245 247
246 void Assembler::StoreIntoObject(Register object, 248 void Assembler::StoreIntoObject(Register object,
247 const Address& dest, 249 const Address& dest,
248 Register value, 250 Register value,
249 bool can_value_be_smi) { 251 bool can_value_be_smi) {
250 ASSERT(object != value); 252 ASSERT(object != value);
(...skipping 180 matching lines...) Expand 10 before | Expand all | Expand 10 after
431 addiu(FP, SP, Immediate(kWordSize)); 433 addiu(FP, SP, Immediate(kWordSize));
432 434
433 // Load the pool pointer. 435 // Load the pool pointer.
434 lw(PP, Address(T0, -object_pool_pc_dist)); 436 lw(PP, Address(T0, -object_pool_pc_dist));
435 437
436 // Reserve space for locals. 438 // Reserve space for locals.
437 AddImmediate(SP, -frame_size); 439 AddImmediate(SP, -frame_size);
438 } 440 }
439 441
440 442
441 void Assembler::LeaveDartFrame() { 443 void Assembler::LeaveDartFrameAndReturn() {
442 addiu(SP, FP, Immediate(-kWordSize)); 444 addiu(SP, FP, Immediate(-kWordSize));
443 445
444 lw(RA, Address(SP, 2 * kWordSize)); 446 lw(RA, Address(SP, 2 * kWordSize));
445 lw(FP, Address(SP, 1 * kWordSize)); 447 lw(FP, Address(SP, 1 * kWordSize));
446 lw(PP, Address(SP, 0 * kWordSize)); 448 lw(PP, Address(SP, 0 * kWordSize));
447 449
448 // Adjust SP for PC pushed in EnterDartFrame. 450 // Adjust SP for PC pushed in EnterDartFrame, and return.
449 addiu(SP, SP, Immediate(4 * kWordSize)); 451 Ret();
452 delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
450 } 453 }
451 454
452 455
453 void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) { 456 void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
454 // Reserve space for arguments and align frame before entering 457 // Reserve space for arguments and align frame before entering
455 // the C++ world. 458 // the C++ world.
456 AddImmediate(SP, -frame_space); 459 AddImmediate(SP, -frame_space);
457 if (OS::ActivationFrameAlignment() > 0) { 460 if (OS::ActivationFrameAlignment() > 0) {
458 LoadImmediate(TMP1, ~(OS::ActivationFrameAlignment() - 1)); 461 LoadImmediate(TMP1, ~(OS::ActivationFrameAlignment() - 1));
459 and_(SP, SP, TMP1); 462 and_(SP, SP, TMP1);
(...skipping 115 matching lines...) Expand 10 before | Expand all | Expand 10 after
575 Emit(reinterpret_cast<int32_t>(message)); 578 Emit(reinterpret_cast<int32_t>(message));
576 Bind(&msg); 579 Bind(&msg);
577 break_(Instr::kMsgMessageCode); 580 break_(Instr::kMsgMessageCode);
578 } 581 }
579 } 582 }
580 583
581 } // namespace dart 584 } // namespace dart
582 585
583 #endif // defined TARGET_ARCH_MIPS 586 #endif // defined TARGET_ARCH_MIPS
584 587
OLDNEW
« no previous file with comments | « runtime/vm/assembler_mips.h ('k') | runtime/vm/assembler_mips_test.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698