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Side by Side Diff: test/unittests/compiler/mips/instruction-selector-mips-unittest.cc

Issue 1485023004: MIPS:[turbofan] Use Ins, Dins to clear bits instead of And with inverted immediate. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix comments. Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file 3 // found in the LICENSE file
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 407 matching lines...) Expand 10 before | Expand all | Expand 10 after
418 EXPECT_EQ(kMipsExt, s[0]->arch_opcode()); 418 EXPECT_EQ(kMipsExt, s[0]->arch_opcode());
419 ASSERT_EQ(3U, s[0]->InputCount()); 419 ASSERT_EQ(3U, s[0]->InputCount());
420 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1))); 420 EXPECT_EQ(lsb, s.ToInt32(s[0]->InputAt(1)));
421 int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width; 421 int32_t actual_width = (lsb + width > 32) ? (32 - lsb) : width;
422 EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2))); 422 EXPECT_EQ(actual_width, s.ToInt32(s[0]->InputAt(2)));
423 } 423 }
424 } 424 }
425 } 425 }
426 426
427 427
428 TEST_F(InstructionSelectorTest, Word32AndToClearBits) {
429 TRACED_FORRANGE(int32_t, shift, 1, 31) {
430 int32_t mask = ~((1 << shift) - 1);
431 StreamBuilder m(this, kMachInt32, kMachInt32);
432 m.Return(m.Word32And(m.Parameter(0), m.Int32Constant(mask)));
433 Stream s = m.Build();
434 ASSERT_EQ(1U, s.size());
435 EXPECT_EQ(kMipsIns, s[0]->arch_opcode());
436 ASSERT_EQ(3U, s[0]->InputCount());
437 EXPECT_EQ(0, s.ToInt32(s[0]->InputAt(1)));
438 EXPECT_EQ(shift, s.ToInt32(s[0]->InputAt(2)));
439 }
440 TRACED_FORRANGE(int32_t, shift, 1, 31) {
441 int32_t mask = ~((1 << shift) - 1);
442 StreamBuilder m(this, kMachInt32, kMachInt32);
443 m.Return(m.Word32And(m.Int32Constant(mask), m.Parameter(0)));
444 Stream s = m.Build();
445 ASSERT_EQ(1U, s.size());
446 EXPECT_EQ(kMipsIns, s[0]->arch_opcode());
447 ASSERT_EQ(3U, s[0]->InputCount());
448 EXPECT_EQ(0, s.ToInt32(s[0]->InputAt(1)));
449 EXPECT_EQ(shift, s.ToInt32(s[0]->InputAt(2)));
450 }
451 }
452
453
428 // ---------------------------------------------------------------------------- 454 // ----------------------------------------------------------------------------
429 // MUL/DIV instructions. 455 // MUL/DIV instructions.
430 // ---------------------------------------------------------------------------- 456 // ----------------------------------------------------------------------------
431 457
432 458
433 typedef InstructionSelectorTestWithParam<MachInst2> 459 typedef InstructionSelectorTestWithParam<MachInst2>
434 InstructionSelectorMulDivTest; 460 InstructionSelectorMulDivTest;
435 461
436 462
437 TEST_P(InstructionSelectorMulDivTest, Parameter) { 463 TEST_P(InstructionSelectorMulDivTest, Parameter) {
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1009 EXPECT_EQ(kMipsFloat64Min, s[0]->arch_opcode()); 1035 EXPECT_EQ(kMipsFloat64Min, s[0]->arch_opcode());
1010 ASSERT_EQ(2U, s[0]->InputCount()); 1036 ASSERT_EQ(2U, s[0]->InputCount());
1011 ASSERT_EQ(1U, s[0]->OutputCount()); 1037 ASSERT_EQ(1U, s[0]->OutputCount());
1012 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 1038 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
1013 } 1039 }
1014 1040
1015 1041
1016 } // namespace compiler 1042 } // namespace compiler
1017 } // namespace internal 1043 } // namespace internal
1018 } // namespace v8 1044 } // namespace v8
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