| OLD | NEW |
| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 6 | 6 |
| 7 #if V8_TARGET_ARCH_MIPS64 | 7 #if V8_TARGET_ARCH_MIPS64 |
| 8 | 8 |
| 9 #include "src/base/division-by-constant.h" | 9 #include "src/base/division-by-constant.h" |
| 10 #include "src/bootstrapper.h" | 10 #include "src/bootstrapper.h" |
| (...skipping 1463 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1474 | 1474 |
| 1475 | 1475 |
| 1476 void MacroAssembler::Dext(Register rt, Register rs, uint16_t pos, | 1476 void MacroAssembler::Dext(Register rt, Register rs, uint16_t pos, |
| 1477 uint16_t size) { | 1477 uint16_t size) { |
| 1478 DCHECK(pos < 32); | 1478 DCHECK(pos < 32); |
| 1479 DCHECK(pos + size < 33); | 1479 DCHECK(pos + size < 33); |
| 1480 dext_(rt, rs, pos, size); | 1480 dext_(rt, rs, pos, size); |
| 1481 } | 1481 } |
| 1482 | 1482 |
| 1483 | 1483 |
| 1484 void MacroAssembler::Dins(Register rt, Register rs, uint16_t pos, |
| 1485 uint16_t size) { |
| 1486 DCHECK(pos < 32); |
| 1487 DCHECK(pos + size <= 32); |
| 1488 DCHECK(size != 0); |
| 1489 dins_(rt, rs, pos, size); |
| 1490 } |
| 1491 |
| 1492 |
| 1484 void MacroAssembler::Ins(Register rt, | 1493 void MacroAssembler::Ins(Register rt, |
| 1485 Register rs, | 1494 Register rs, |
| 1486 uint16_t pos, | 1495 uint16_t pos, |
| 1487 uint16_t size) { | 1496 uint16_t size) { |
| 1488 DCHECK(pos < 32); | 1497 DCHECK(pos < 32); |
| 1489 DCHECK(pos + size <= 32); | 1498 DCHECK(pos + size <= 32); |
| 1490 DCHECK(size != 0); | 1499 DCHECK(size != 0); |
| 1491 ins_(rt, rs, pos, size); | 1500 ins_(rt, rs, pos, size); |
| 1492 } | 1501 } |
| 1493 | 1502 |
| (...skipping 4789 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 6283 if (mag.shift > 0) sra(result, result, mag.shift); | 6292 if (mag.shift > 0) sra(result, result, mag.shift); |
| 6284 srl(at, dividend, 31); | 6293 srl(at, dividend, 31); |
| 6285 Addu(result, result, Operand(at)); | 6294 Addu(result, result, Operand(at)); |
| 6286 } | 6295 } |
| 6287 | 6296 |
| 6288 | 6297 |
| 6289 } // namespace internal | 6298 } // namespace internal |
| 6290 } // namespace v8 | 6299 } // namespace v8 |
| 6291 | 6300 |
| 6292 #endif // V8_TARGET_ARCH_MIPS64 | 6301 #endif // V8_TARGET_ARCH_MIPS64 |
| OLD | NEW |