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Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 1485023004: MIPS:[turbofan] Use Ins, Dins to clear bits instead of And with inverted immediate. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix comments. Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 14 matching lines...) Expand all
25 V(MipsModU) \ 25 V(MipsModU) \
26 V(MipsAnd) \ 26 V(MipsAnd) \
27 V(MipsOr) \ 27 V(MipsOr) \
28 V(MipsNor) \ 28 V(MipsNor) \
29 V(MipsXor) \ 29 V(MipsXor) \
30 V(MipsClz) \ 30 V(MipsClz) \
31 V(MipsShl) \ 31 V(MipsShl) \
32 V(MipsShr) \ 32 V(MipsShr) \
33 V(MipsSar) \ 33 V(MipsSar) \
34 V(MipsExt) \ 34 V(MipsExt) \
35 V(MipsIns) \
35 V(MipsRor) \ 36 V(MipsRor) \
36 V(MipsMov) \ 37 V(MipsMov) \
37 V(MipsTst) \ 38 V(MipsTst) \
38 V(MipsCmp) \ 39 V(MipsCmp) \
39 V(MipsCmpS) \ 40 V(MipsCmpS) \
40 V(MipsAddS) \ 41 V(MipsAddS) \
41 V(MipsSubS) \ 42 V(MipsSubS) \
42 V(MipsMulS) \ 43 V(MipsMulS) \
43 V(MipsDivS) \ 44 V(MipsDivS) \
44 V(MipsModS) \ 45 V(MipsModS) \
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after
112 #define TARGET_ADDRESSING_MODE_LIST(V) \ 113 #define TARGET_ADDRESSING_MODE_LIST(V) \
113 V(MRI) /* [%r0 + K] */ \ 114 V(MRI) /* [%r0 + K] */ \
114 V(MRR) /* [%r0 + %r1] */ 115 V(MRR) /* [%r0 + %r1] */
115 116
116 117
117 } // namespace compiler 118 } // namespace compiler
118 } // namespace internal 119 } // namespace internal
119 } // namespace v8 120 } // namespace v8
120 121
121 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 122 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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