Index: src/mips/assembler-mips.cc |
diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc |
index 78abaa48ae93386cbfeb32aebbb7d06072779de5..47c7a524946a2c418d73f552d95e68c8abe40159 100644 |
--- a/src/mips/assembler-mips.cc |
+++ b/src/mips/assembler-mips.cc |
@@ -1819,7 +1819,7 @@ void Assembler::lui(Register rd, int32_t j) { |
} |
-void Assembler::aui(Register rs, Register rt, int32_t j) { |
+void Assembler::aui(Register rt, Register rs, int32_t j) { |
// This instruction uses same opcode as 'lui'. The difference in encoding is |
// 'lui' has zero reg. for rs field. |
DCHECK(!(rs.is(zero_reg))); |