| Index: src/mips/assembler-mips.cc
|
| diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc
|
| index b8e1469d8dfe8118ccc12f1a49a9d387d9699f8d..34a85493ee916863796791466adb5a3349cd1054 100644
|
| --- a/src/mips/assembler-mips.cc
|
| +++ b/src/mips/assembler-mips.cc
|
| @@ -1818,7 +1818,7 @@ void Assembler::lui(Register rd, int32_t j) {
|
| }
|
|
|
|
|
| -void Assembler::aui(Register rs, Register rt, int32_t j) {
|
| +void Assembler::aui(Register rt, Register rs, int32_t j) {
|
| // This instruction uses same opcode as 'lui'. The difference in encoding is
|
| // 'lui' has zero reg. for rs field.
|
| DCHECK(!(rs.is(zero_reg)));
|
|
|