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Issue 1481493002: (mips) adding simulator support for AUI/DAUI/DAHI/DATI instructions. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: fix mips64 compilation error. Created 5 years ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> 5 #include <limits.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 #include <cmath> 8 #include <cmath>
9 9
10 #if V8_TARGET_ARCH_MIPS 10 #if V8_TARGET_ARCH_MIPS
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4037 case ANDI: 4037 case ANDI:
4038 SetResult(rt_reg, rs & oe_imm16); 4038 SetResult(rt_reg, rs & oe_imm16);
4039 break; 4039 break;
4040 case ORI: 4040 case ORI:
4041 SetResult(rt_reg, rs | oe_imm16); 4041 SetResult(rt_reg, rs | oe_imm16);
4042 break; 4042 break;
4043 case XORI: 4043 case XORI:
4044 SetResult(rt_reg, rs ^ oe_imm16); 4044 SetResult(rt_reg, rs ^ oe_imm16);
4045 break; 4045 break;
4046 case LUI: 4046 case LUI:
4047 SetResult(rt_reg, oe_imm16 << 16); 4047 if (rs_reg != 0) {
4048 // AUI
4049 DCHECK(IsMipsArchVariant(kMips32r6));
4050 SetResult(rt_reg, rs + (se_imm16 << 16));
4051 } else {
4052 // LUI
4053 SetResult(rt_reg, oe_imm16 << 16);
4054 }
4048 break; 4055 break;
4049 // ------------- Memory instructions. 4056 // ------------- Memory instructions.
4050 case LB: 4057 case LB:
4051 set_register(rt_reg, ReadB(rs + se_imm16)); 4058 set_register(rt_reg, ReadB(rs + se_imm16));
4052 break; 4059 break;
4053 case LH: 4060 case LH:
4054 set_register(rt_reg, ReadH(rs + se_imm16, instr)); 4061 set_register(rt_reg, ReadH(rs + se_imm16, instr));
4055 break; 4062 break;
4056 case LWL: { 4063 case LWL: {
4057 // al_offset is offset of the effective address within an aligned word. 4064 // al_offset is offset of the effective address within an aligned word.
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4435 4442
4436 4443
4437 #undef UNSUPPORTED 4444 #undef UNSUPPORTED
4438 4445
4439 } // namespace internal 4446 } // namespace internal
4440 } // namespace v8 4447 } // namespace v8
4441 4448
4442 #endif // USE_SIMULATOR 4449 #endif // USE_SIMULATOR
4443 4450
4444 #endif // V8_TARGET_ARCH_MIPS 4451 #endif // V8_TARGET_ARCH_MIPS
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