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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // A Disassembler object is used to disassemble a block of code instruction by | 5 // A Disassembler object is used to disassemble a block of code instruction by |
6 // instruction. The default implementation of the NameConverter object can be | 6 // instruction. The default implementation of the NameConverter object can be |
7 // overriden to modify register names or to do symbol lookup on addresses. | 7 // overriden to modify register names or to do symbol lookup on addresses. |
8 // | 8 // |
9 // The example below will disassemble a block of code and print it to stdout. | 9 // The example below will disassemble a block of code and print it to stdout. |
10 // | 10 // |
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1523 Format(instr, "ori 'rt, 'rs, 'imm16x"); | 1523 Format(instr, "ori 'rt, 'rs, 'imm16x"); |
1524 break; | 1524 break; |
1525 case XORI: | 1525 case XORI: |
1526 Format(instr, "xori 'rt, 'rs, 'imm16x"); | 1526 Format(instr, "xori 'rt, 'rs, 'imm16x"); |
1527 break; | 1527 break; |
1528 case LUI: | 1528 case LUI: |
1529 if (!IsMipsArchVariant(kMips32r6)) { | 1529 if (!IsMipsArchVariant(kMips32r6)) { |
1530 Format(instr, "lui 'rt, 'imm16x"); | 1530 Format(instr, "lui 'rt, 'imm16x"); |
1531 } else { | 1531 } else { |
1532 if (instr->RsValue() != 0) { | 1532 if (instr->RsValue() != 0) { |
1533 Format(instr, "aui 'rt, 'imm16x"); | 1533 Format(instr, "aui 'rt, 'rs, 'imm16x"); |
1534 } else { | 1534 } else { |
1535 Format(instr, "lui 'rt, 'imm16x"); | 1535 Format(instr, "lui 'rt, 'imm16x"); |
1536 } | 1536 } |
1537 } | 1537 } |
1538 break; | 1538 break; |
1539 // ------------- Memory instructions. | 1539 // ------------- Memory instructions. |
1540 case LB: | 1540 case LB: |
1541 Format(instr, "lb 'rt, 'imm16s('rs)"); | 1541 Format(instr, "lb 'rt, 'imm16s('rs)"); |
1542 break; | 1542 break; |
1543 case LH: | 1543 case LH: |
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1744 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1744 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
1745 } | 1745 } |
1746 } | 1746 } |
1747 | 1747 |
1748 | 1748 |
1749 #undef UNSUPPORTED | 1749 #undef UNSUPPORTED |
1750 | 1750 |
1751 } // namespace disasm | 1751 } // namespace disasm |
1752 | 1752 |
1753 #endif // V8_TARGET_ARCH_MIPS | 1753 #endif // V8_TARGET_ARCH_MIPS |
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