(mips) adding simulator support for AUI/DAUI/DAHI/DATI instructions.

src/mips64/disasm-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // A Disassembler object is used to disassemble a block of code instruction by
 // instruction. The default implementation of the NameConverter object can be
 // overriden to modify register names or to do symbol lookup on addresses.
 //
 // The example below will disassemble a block of code and print it to stdout.
 //
@@ skipping 1517 matching lines @@
       if (instr->RsValue() == 0)
         Format(instr, "bal     'imm16s -> 'imm16p4s2");
       else
         Format(instr, "bgezal  'rs, 'imm16u -> 'imm16p4s2");
       break;
     }
     case BGEZALL:
       Format(instr, "bgezall 'rs, 'imm16u -> 'imm16p4s2");
       break;
     case DAHI:
-      Format(instr, "dahi    'rs, 'imm16u");
+      Format(instr, "dahi    'rs, 'imm16x");
       break;
     case DATI:
-      Format(instr, "dati    'rs, 'imm16u");
+      Format(instr, "dati    'rs, 'imm16x");
       break;
     default:
       UNREACHABLE();
   }
 }
 
 
 void Decoder::DecodeTypeImmediate(Instruction* instr) {
   switch (instr->OpcodeFieldRaw()) {
     case COP1:
@@ skipping 132 matching lines @@
       Format(instr, "ori     'rt, 'rs, 'imm16x");
       break;
     case XORI:
       Format(instr, "xori    'rt, 'rs, 'imm16x");
       break;
     case LUI:
       if (kArchVariant != kMips64r6) {
         Format(instr, "lui     'rt, 'imm16x");
       } else {
         if (instr->RsValue() != 0) {
-          Format(instr, "aui     'rt, 'imm16x");
+          Format(instr, "aui     'rt, 'rs, 'imm16x");
         } else {
           Format(instr, "lui     'rt, 'imm16x");
         }
       }
       break;
     case DAUI:
-      Format(instr, "daui    'rt, 'imm16x");
+      Format(instr, "daui    'rt, 'rs, 'imm16x");
       break;
     // ------------- Memory instructions.
     case LB:
       Format(instr, "lb      'rt, 'imm16s('rs)");
       break;
     case LH:
       Format(instr, "lh      'rt, 'imm16s('rs)");
       break;
     case LWL:
       Format(instr, "lwl     'rt, 'imm16s('rs)");
@@ skipping 227 matching lines @@
         prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
   }
 }
 
 
 #undef UNSUPPORTED
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_MIPS64