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Side by Side Diff: src/mips/disasm-mips.cc

Issue 1481493002: (mips) adding simulator support for AUI/DAUI/DAHI/DATI instructions. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: adding disasm tests. Created 5 years ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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1491 Format(instr, "ori 'rt, 'rs, 'imm16x"); 1491 Format(instr, "ori 'rt, 'rs, 'imm16x");
1492 break; 1492 break;
1493 case XORI: 1493 case XORI:
1494 Format(instr, "xori 'rt, 'rs, 'imm16x"); 1494 Format(instr, "xori 'rt, 'rs, 'imm16x");
1495 break; 1495 break;
1496 case LUI: 1496 case LUI:
1497 if (!IsMipsArchVariant(kMips32r6)) { 1497 if (!IsMipsArchVariant(kMips32r6)) {
1498 Format(instr, "lui 'rt, 'imm16x"); 1498 Format(instr, "lui 'rt, 'imm16x");
1499 } else { 1499 } else {
1500 if (instr->RsValue() != 0) { 1500 if (instr->RsValue() != 0) {
1501 Format(instr, "aui 'rt, 'imm16x"); 1501 Format(instr, "aui 'rt, 'rs, 'imm16x");
1502 } else { 1502 } else {
1503 Format(instr, "lui 'rt, 'imm16x"); 1503 Format(instr, "lui 'rt, 'imm16x");
1504 } 1504 }
1505 } 1505 }
1506 break; 1506 break;
1507 // ------------- Memory instructions. 1507 // ------------- Memory instructions.
1508 case LB: 1508 case LB:
1509 Format(instr, "lb 'rt, 'imm16s('rs)"); 1509 Format(instr, "lb 'rt, 'imm16s('rs)");
1510 break; 1510 break;
1511 case LH: 1511 case LH:
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1712 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1712 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1713 } 1713 }
1714 } 1714 }
1715 1715
1716 1716
1717 #undef UNSUPPORTED 1717 #undef UNSUPPORTED
1718 1718
1719 } // namespace disasm 1719 } // namespace disasm
1720 1720
1721 #endif // V8_TARGET_ARCH_MIPS 1721 #endif // V8_TARGET_ARCH_MIPS
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