Make abbreviations explicit in pnacl-freeze/thaw.

include/llvm/Bitcode/NaCl/NaClBitstreamWriter.h

 //===- NaClBitstreamWriter.h - NaCl bitstream writer ------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This header defines the BitstreamWriter class.  This class can be used to
@@ skipping 15 matching lines @@
   SmallVectorImpl<char> &Out;
 
   /// CurBit - Always between 0 and 31 inclusive, specifies the next bit to use.
   unsigned CurBit;
 
   /// CurValue - The current value.  Only bits < CurBit are valid.
   uint32_t CurValue;
 
   /// CurCodeSize - This is the declared size of code values used for the
   /// current block, in bits.
-  unsigned CurCodeSize;
+  NaClBitcodeSelectorAbbrev CurCodeSize;
 
   /// BlockInfoCurBID - When emitting a BLOCKINFO_BLOCK, this is the currently
   /// selected BLOCK ID.
   unsigned BlockInfoCurBID;
 
   /// CurAbbrevs - Abbrevs installed at in this block.
   std::vector<NaClBitCodeAbbrev*> CurAbbrevs;
 
   struct Block {
-    unsigned PrevCodeSize;
+    NaClBitcodeSelectorAbbrev PrevCodeSize;
     unsigned StartSizeWord;
     std::vector<NaClBitCodeAbbrev*> PrevAbbrevs;
-    Block(unsigned PCS, unsigned SSW) : PrevCodeSize(PCS), StartSizeWord(SSW) {}
+    Block(const NaClBitcodeSelectorAbbrev& PCS, unsigned SSW)
+        : PrevCodeSize(PCS), StartSizeWord(SSW) {}
   };
 
   /// BlockScope - This tracks the current blocks that we have entered.
   std::vector<Block> BlockScope;
 
   /// BlockInfo - This contains information emitted to BLOCKINFO_BLOCK blocks.
   /// These describe abbreviations that all blocks of the specified ID inherit.
   struct BlockInfo {
     unsigned BlockID;
     std::vector<NaClBitCodeAbbrev*> Abbrevs;
@@ skipping 27 matching lines @@
   }
 
   unsigned GetWordIndex() const {
     unsigned Offset = GetBufferOffset();
     assert((Offset & 3) == 0 && "Not 32-bit aligned");
     return Offset / 4;
   }
 
 public:
   explicit NaClBitstreamWriter(SmallVectorImpl<char> &O)
-    : Out(O), CurBit(0), CurValue(0), CurCodeSize(2) {}
+      : Out(O), CurBit(0), CurValue(0), CurCodeSize() {}
 
   ~NaClBitstreamWriter() {
     assert(CurBit == 0 && "Unflused data remaining");
     assert(BlockScope.empty() && CurAbbrevs.empty() && "Block imbalance");
 
     // Free the BlockInfoRecords.
     while (!BlockInfoRecords.empty()) {
       BlockInfo &Info = BlockInfoRecords.back();
       // Free blockinfo abbrev info.
       for (unsigned i = 0, e = static_cast<unsigned>(Info.Abbrevs.size());
@@ skipping 22 matching lines @@
     // Add the current word.
     WriteWord(CurValue);
 
     if (CurBit)
       CurValue = Val >> (32-CurBit);
     else
       CurValue = 0;
     CurBit = (CurBit+NumBits) & 31;
   }
 
+  void EmitBool(bool b) {

[Karl, 2013/05/20 22:59:20]

Deleting this, since it is no longer needed.

+    Emit((uint32_t) b, 1);
+  }
+
   void Emit64(uint64_t Val, unsigned NumBits) {
     if (NumBits <= 32)
       Emit((uint32_t)Val, NumBits);
     else {
       Emit((uint32_t)Val, 32);
       Emit((uint32_t)(Val >> 32), NumBits-32);
     }
   }
 
   void FlushToWord() {
     if (CurBit) {
       WriteWord(CurValue);
       CurBit = 0;
       CurValue = 0;
     }
   }
 
   void EmitVBR(uint32_t Val, unsigned NumBits) {
     assert(NumBits <= 32 && "Too many bits to emit!");
+    assert(NumBits > 1 && "Too few bits to emit!");
     uint32_t Threshold = 1U << (NumBits-1);
 
     // Emit the bits with VBR encoding, NumBits-1 bits at a time.
     while (Val >= Threshold) {
       Emit((Val & ((1 << (NumBits-1))-1)) | (1 << (NumBits-1)), NumBits);
       Val >>= NumBits-1;
     }
 
     Emit(Val, NumBits);
   }
 
   void EmitVBR64(uint64_t Val, unsigned NumBits) {
     assert(NumBits <= 32 && "Too many bits to emit!");
+    assert(NumBits > 1 && "Too few bits to emit!");
     if ((uint32_t)Val == Val)
       return EmitVBR((uint32_t)Val, NumBits);
 
     uint32_t Threshold = 1U << (NumBits-1);
 
     // Emit the bits with VBR encoding, NumBits-1 bits at a time.
     while (Val >= Threshold) {
       Emit(((uint32_t)Val & ((1 << (NumBits-1))-1)) |
            (1 << (NumBits-1)), NumBits);
       Val >>= NumBits-1;
     }
 
     Emit((uint32_t)Val, NumBits);
   }
 
   /// EmitCode - Emit the specified code.
   void EmitCode(unsigned Val) {
-    Emit(Val, CurCodeSize);
+    if (CurCodeSize.IsFixed)
+      Emit(Val, CurCodeSize.NumBits);
+    else
+      EmitVBR(Val, CurCodeSize.NumBits);
   }
 
   //===--------------------------------------------------------------------===//
   // Block Manipulation
   //===--------------------------------------------------------------------===//
 
   /// getBlockInfo - If there is block info for the specified ID, return it,
   /// otherwise return null.
   BlockInfo *getBlockInfo(unsigned BlockID) {
     // Common case, the most recent entry matches BlockID.
     if (!BlockInfoRecords.empty() && BlockInfoRecords.back().BlockID == BlockID)
       return &BlockInfoRecords.back();
 
     for (unsigned i = 0, e = static_cast<unsigned>(BlockInfoRecords.size());
          i != e; ++i)
       if (BlockInfoRecords[i].BlockID == BlockID)
         return &BlockInfoRecords[i];
     return 0;
   }
 
-  void EnterSubblock(unsigned BlockID, unsigned CodeLen) {
+  // Enter block using CodeLen bits to read the size of the code selector
+  // associated with the block.
+  void EnterSubblock(unsigned BlockID,
+                     const NaClBitcodeSelectorAbbrev& CodeLen) {
     // Block header:
     //    [ENTER_SUBBLOCK, blockid, newcodelen, <align4bytes>, blocklen]
     EmitCode(naclbitc::ENTER_SUBBLOCK);
     EmitVBR(BlockID, naclbitc::BlockIDWidth);
-    EmitVBR(CodeLen, naclbitc::CodeLenWidth);
+    EmitBool(CodeLen.IsFixed);

[jvoung (off chromium), 2013/05/17 23:40:48]

See below:  if the fixedabbrevcutoff variant isn't used, then there's no need to
deviate from upstream and end up with an extra EmitBool here?

[Karl, 2013/05/20 22:59:20]

Deleted.

+    EmitVBR(CodeLen.NumBits, naclbitc::CodeLenWidth);
     FlushToWord();
 
     unsigned BlockSizeWordIndex = GetWordIndex();
-    unsigned OldCodeSize = CurCodeSize;
+    NaClBitcodeSelectorAbbrev OldCodeSize(CurCodeSize);
 
     // Emit a placeholder, which will be replaced when the block is popped.
     Emit(0, naclbitc::BlockSizeWidth);
 
     CurCodeSize = CodeLen;
 
     // Push the outer block's abbrev set onto the stack, start out with an
     // empty abbrev set.
     BlockScope.push_back(Block(OldCodeSize, BlockSizeWordIndex));
     BlockScope.back().PrevAbbrevs.swap(CurAbbrevs);
 
     // If there is a blockinfo for this BlockID, add all the predefined abbrevs
     // to the abbrev list.
     if (BlockInfo *Info = getBlockInfo(BlockID)) {
       for (unsigned i = 0, e = static_cast<unsigned>(Info->Abbrevs.size());
            i != e; ++i) {
         CurAbbrevs.push_back(Info->Abbrevs[i]);
         Info->Abbrevs[i]->addRef();
       }
     }
   }
 
+  // Enter block with no abbreviations.
+  void EnterSubblock(unsigned BlockID) {
+    NaClBitcodeSelectorAbbrev DefaultCodeLen;
+    EnterSubblock(BlockID, DefaultCodeLen);
+  }
+
+  // Enter block with the given number of abbreviations.
+  void EnterSubblock(unsigned BlockID, unsigned NumAbbrev) {
+    NaClBitcodeSelectorAbbrev CodeLenAbbrev(NumAbbrev);
+    EnterSubblock(BlockID, CodeLenAbbrev);
+  }
+
+  // Enter block with the given number of abbreviations NumAbbrev,
+  // with the constraint that all abbreviations < FixedAbbrevCutoff will
+  // be read using a single read.
+  void EnterSubblock(unsigned BlockId,

[jvoung (off chromium), 2013/05/17 23:40:48]

Is this actually used?

[Karl, 2013/05/20 22:59:20]

Again, I'm over planning changes. Removing this case, since it is not yet
necessary.

+                     unsigned NumAbbrev,
+                     unsigned FixedAbbrevCutoff) {
+    NaClBitcodeSelectorAbbrev CodeLenAbbrev(FixedAbbrevCutoff, NumAbbrev);
+    EnterSubblock(BlockId, CodeLenAbbrev);
+  }
+
   void ExitBlock() {
     assert(!BlockScope.empty() && "Block scope imbalance!");
 
     // Delete all abbrevs.
     for (unsigned i = 0, e = static_cast<unsigned>(CurAbbrevs.size());
          i != e; ++i)
       CurAbbrevs[i]->dropRef();
 
     const Block &B = BlockScope.back();
 
@@ skipping 242 matching lines @@
     CurAbbrevs.push_back(Abbv);
     return static_cast<unsigned>(CurAbbrevs.size())-1 +
       naclbitc::FIRST_APPLICATION_ABBREV;
   }
 
   //===--------------------------------------------------------------------===//
   // BlockInfo Block Emission
   //===--------------------------------------------------------------------===//
 
   /// EnterBlockInfoBlock - Start emitting the BLOCKINFO_BLOCK.
-  void EnterBlockInfoBlock(unsigned CodeWidth) {
-    EnterSubblock(naclbitc::BLOCKINFO_BLOCK_ID, CodeWidth);
+  void EnterBlockInfoBlock() {
+    EnterSubblock(naclbitc::BLOCKINFO_BLOCK_ID);
     BlockInfoCurBID = ~0U;
   }
 private:
   /// SwitchToBlockID - If we aren't already talking about the specified block
   /// ID, emit a BLOCKINFO_CODE_SETBID record.
   void SwitchToBlockID(unsigned BlockID) {
     if (BlockInfoCurBID == BlockID) return;
     SmallVector<unsigned, 2> V;
     V.push_back(BlockID);
     EmitRecord(naclbitc::BLOCKINFO_CODE_SETBID, V);
@@ skipping 23 matching lines @@
     Info.Abbrevs.push_back(Abbv);
 
     return Info.Abbrevs.size()-1+naclbitc::FIRST_APPLICATION_ABBREV;
   }
 };
 
 
 } // End llvm namespace
 
 #endif