Subzero. ARM32. Show FP lowering some love.

tests_lit/llvm2ice_tests/arith.ll

 ; Assembly test for simple arithmetic operations.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
 ; once enough infrastructure is in. Also, switch to --filetype=obj
 ; when possible.
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
@@ skipping 99 matching lines @@
 ; Check for a valid ARM mul instruction where operands have to be registers.
 ; On the other hand x86-32 does allow an immediate.
 define internal i32 @MulImm(i32 %a, i32 %b) {
 entry:
   %mul = mul i32 %a, 99
   ret i32 %mul
 }
 ; CHECK-LABEL: MulImm
 ; CHECK: imul e{{.*}},e{{.*}},0x63
 ; ARM32-LABEL: MulImm
-; ARM32-OPTM1: movw {{.*}}, #99
+; ARM32-OPTM1: mov {{.*}}, #99
 ; ARM32-OPTM1: mul r{{.*}}, r{{.*}}, r{{.*}}
 ; ARM32-OPT2: rsb [[T:r[0-9]+]], [[S:r[0-9]+]], [[S]], lsl #2
 ; ARM32-OPT2-DAG: add [[T]], [[T]], [[S]], lsl #7
 ; ARM32-OPT2-DAG: sub [[T]], [[T]], [[S]], lsl #5
 ; MIPS32-LABEL: MulImm
 ; MIPS32: mul
 
 ; Check for a valid addressing mode in the x86-32 mul instruction when
 ; the second source operand is an immediate.
 define internal i64 @MulImm64(i64 %a) {
 entry:
   %mul = mul i64 %a, 99
   ret i64 %mul
 }
 ; NOTE: the lowering is currently a bit inefficient for small 64-bit constants.
 ; The top bits of the immediate are 0, but the instructions modeling that
 ; multiply by 0 are not eliminated (see expanded 64-bit ARM lowering).
 ; CHECK-LABEL: MulImm64
 ; CHECK: mov {{.*}},0x63
 ; CHECK: mov {{.*}},0x0
 ; CHECK-NOT: mul {{[0-9]+}}
 ;
 ; ARM32-LABEL: MulImm64
-; ARM32: movw {{.*}}, #99
-; ARM32: movw {{.*}}, #0
+; ARM32: mov {{.*}}, #99
+; ARM32: mov {{.*}}, #0
 ; ARM32: mul r
 ; ARM32: mla r
 ; ARM32: umull r
 ; ARM32: add r
 
 ; MIPS32-LABEL: MulImm64
 
 define internal i32 @Sdiv(i32 %a, i32 %b) {
 entry:
   %div = sdiv i32 %a, %b
@@ skipping 117 matching lines @@
 ; CHECK: shr {{.*}},cl
 
 define internal i32 @AshrReloc(i32 %a) {
 entry:
   %opnd = ptrtoint [4 x i8]* @G to i32
   %result = ashr i32 %a, %opnd
   ret i32 %result
 }
 ; CHECK-LABEL: AshrReloc
 ; CHECK: sar {{.*}},cl