Index: src/mips64/cpu-mips64.cc |
diff --git a/src/mips64/cpu-mips64.cc b/src/mips64/cpu-mips64.cc |
index 6c24fd06a90dee022274774b33c8ae940a6cf4b2..6e5910b3ffc5e81b24ac437ac1f48bfee4580b48 100644 |
--- a/src/mips64/cpu-mips64.cc |
+++ b/src/mips64/cpu-mips64.cc |
@@ -23,12 +23,12 @@ namespace internal { |
void CpuFeatures::FlushICache(void* start, size_t size) { |
+#if !defined(USE_SIMULATOR) |
// Nothing to do, flushing no instructions. |
if (size == 0) { |
return; |
} |
-#if !defined (USE_SIMULATOR) |
#if defined(ANDROID) && !defined(__LP64__) |
// Bionic cacheflush can typically run in userland, avoiding kernel call. |
char *end = reinterpret_cast<char *>(start) + size; |
@@ -42,14 +42,7 @@ void CpuFeatures::FlushICache(void* start, size_t size) { |
V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache"); |
} |
#endif // ANDROID |
-#else // USE_SIMULATOR. |
- // Not generating mips instructions for C-code. This means that we are |
- // building a mips emulator based target. We should notify the simulator |
- // that the Icache was flushed. |
- // None of this code ends up in the snapshot so there are no issues |
- // around whether or not to generate the code when building snapshots. |
- Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size); |
-#endif // USE_SIMULATOR. |
+#endif // !USE_SIMULATOR. |
} |
} // namespace internal |